misc: Rename misc.(hh|cc) to logging.(hh|cc)
authorGabe Black <gabeblack@google.com>
Fri, 1 Dec 2017 01:36:53 +0000 (17:36 -0800)
committerGabe Black <gabeblack@google.com>
Mon, 4 Dec 2017 23:10:55 +0000 (23:10 +0000)
commit1088f0c4ac3999fc3c363cc51daef4cfb360a2bd
tree64b3cc0b13bd6ba6aa375163765d36b385d32663
parent86f18f26fc7223cc8a63a792d2be1267f573f97c
misc: Rename misc.(hh|cc) to logging.(hh|cc)

These files aren't a collection of miscellaneous stuff, they're the
definition of the Logger interface, and a few utility macros for
calling into that interface (panic, warn, etc.).

Change-Id: I84267ac3f45896a83c0ef027f8f19c5e9a5667d1
Reviewed-on: https://gem5-review.googlesource.com/6226
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
182 files changed:
ext/sst/gem5.cc
src/arch/alpha/isa.cc
src/arch/alpha/locked_mem.hh
src/arch/alpha/mt.hh
src/arch/alpha/process.cc
src/arch/alpha/pseudo_inst.hh
src/arch/alpha/utility.hh
src/arch/arm/faults.hh
src/arch/arm/isa_device.cc
src/arch/arm/miscregs.cc
src/arch/arm/process.cc
src/arch/arm/pseudo_inst.hh
src/arch/arm/types.hh
src/arch/arm/utility.hh
src/arch/generic/debugfaults.hh
src/arch/generic/pseudo_inst.cc
src/arch/generic/tlb.hh
src/arch/generic/vec_reg.hh
src/arch/hsail/gpu_isa.hh
src/arch/mips/decoder.hh
src/arch/mips/dsp.cc
src/arch/mips/dsp.hh
src/arch/mips/interrupts.hh
src/arch/mips/locked_mem.hh
src/arch/mips/mt.hh
src/arch/mips/pagetable.hh
src/arch/mips/process.cc
src/arch/mips/pseudo_inst.hh
src/arch/mips/registers.hh
src/arch/mips/utility.cc
src/arch/mips/utility.hh
src/arch/power/interrupts.hh
src/arch/power/isa.hh
src/arch/power/process.cc
src/arch/power/pseudo_inst.hh
src/arch/power/utility.cc
src/arch/riscv/decoder.hh
src/arch/riscv/interrupts.hh
src/arch/riscv/isa.hh
src/arch/riscv/locked_mem.hh
src/arch/riscv/pagetable.hh
src/arch/riscv/process.cc
src/arch/riscv/pseudo_inst.hh
src/arch/sparc/isa/includes.isa
src/arch/sparc/mt.hh
src/arch/sparc/pagetable.hh
src/arch/sparc/process.cc
src/arch/sparc/pseudo_inst.hh
src/arch/sparc/tlb.hh
src/arch/sparc/utility.hh
src/arch/x86/bios/intelmp.cc
src/arch/x86/decoder.cc
src/arch/x86/decoder.hh
src/arch/x86/emulenv.cc
src/arch/x86/faults.hh
src/arch/x86/isa/includes.isa
src/arch/x86/process.cc
src/arch/x86/regs/int.hh
src/base/SConscript
src/base/addr_range.hh
src/base/bigint.hh
src/base/bmpwriter.cc
src/base/circlebuf.hh
src/base/debug.cc
src/base/hostinfo.cc
src/base/imgwriter.cc
src/base/intmath.hh
src/base/loader/ecoff_object.cc
src/base/loader/elf_object.cc
src/base/loader/object_file.hh
src/base/loader/symtab.cc
src/base/logging.cc [new file with mode: 0644]
src/base/logging.hh [new file with mode: 0644]
src/base/misc.cc [deleted file]
src/base/misc.hh [deleted file]
src/base/output.cc
src/base/pngwriter.cc
src/base/pollevent.cc
src/base/random.cc
src/base/socket.cc
src/base/statistics.cc
src/base/stats/text.cc
src/base/time.cc
src/base/trace.cc
src/base/trie.hh
src/base/vnc/vncinput.cc
src/base/vnc/vncserver.cc
src/cpu/base.cc
src/cpu/func_unit.cc
src/cpu/intr_control.hh
src/cpu/kvm/device.cc
src/cpu/kvm/perfevent.cc
src/cpu/kvm/timer.cc
src/cpu/minor/buffers.hh
src/cpu/o3/free_list.hh
src/cpu/o3/store_set.cc
src/cpu/pc_event.hh
src/cpu/pred/2bit_local.cc
src/cpu/pred/btb.hh
src/cpu/pred/ltage.cc
src/cpu/pred/sat_counter.hh
src/cpu/simple/base.cc
src/cpu/static_inst.hh
src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc
src/cpu/testers/rubytest/RubyTester.cc
src/cpu/thread_context.cc
src/dev/intel_8254_timer.cc
src/dev/mc146818.hh
src/dev/net/dist_iface.hh
src/dev/net/etherbus.cc
src/dev/net/etherdump.cc
src/dev/net/etherint.cc
src/dev/net/etherpkt.cc
src/dev/net/ethertap.cc
src/dev/net/pktfifo.cc
src/dev/net/pktfifo.hh
src/dev/pci/device.cc
src/dev/platform.cc
src/dev/ps2.cc
src/dev/serial/serial.cc
src/dev/serial/terminal.cc
src/dev/storage/disk_image.cc
src/dev/storage/simple_disk.cc
src/gpu-compute/brig_object.cc
src/gpu-compute/gpu_tlb.hh
src/gpu-compute/hsa_object.cc
src/gpu-compute/misc.hh
src/gpu-compute/of_scheduling_policy.hh
src/gpu-compute/rr_scheduling_policy.hh
src/gpu-compute/simple_pool_manager.cc
src/gpu-compute/tlb_coalescer.hh
src/gpu-compute/vector_register_file.cc
src/gpu-compute/wavefront.hh
src/kern/operatingsystem.cc
src/mem/cache/base.hh
src/mem/cache/cache.cc
src/mem/cache/cache.hh
src/mem/cache/mshr.cc
src/mem/cache/tags/fa_lru.cc
src/mem/cache/write_queue_entry.cc
src/mem/coherent_xbar.cc
src/mem/dramsim2_wrapper.cc
src/mem/mem_checker.hh
src/mem/noncoherent_xbar.cc
src/mem/packet.cc
src/mem/packet.hh
src/mem/request.hh
src/mem/ruby/common/Set.hh
src/mem/ruby/network/MessageBuffer.cc
src/mem/ruby/network/Network.cc
src/mem/ruby/network/fault_model/FaultModel.cc
src/mem/ruby/slicc_interface/AbstractCacheEntry.hh
src/mem/ruby/structures/AbstractReplacementPolicy.cc
src/mem/ruby/system/GPUCoalescer.cc
src/mem/ruby/system/Sequencer.cc
src/mem/ruby/system/VIPERCoalescer.cc
src/mem/slicc/symbols/StateMachine.py
src/mem/slicc/symbols/Type.py
src/mem/snoop_filter.cc
src/mem/xbar.cc
src/proto/protoio.cc
src/python/pybind11/core.cc
src/python/pybind11/event.cc
src/sim/clocked_object.cc
src/sim/drain.cc
src/sim/dvfs_handler.cc
src/sim/eventq.cc
src/sim/faults.cc
src/sim/fd_array.cc
src/sim/init.cc
src/sim/init_signals.cc
src/sim/mathexpr.cc
src/sim/microcode_rom.cc
src/sim/root.cc
src/sim/serialize.cc
src/sim/sim_object.cc
src/sim/simulate.cc
src/sim/syscall_emul.hh
src/unittest/cprintftest.cc
src/unittest/nmtest.cc
src/unittest/stattest.cc
util/systemc/sc_module.cc