2022-07-20 |
Luke Kenneth Casson... | rename substep to ssubstep, add dsubstep to SVP64State
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2022-07-20 |
Luke Kenneth Casson... | add first subvl unit test, subvl comes from
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2022-07-18 |
Luke Kenneth Casson... | move D-Immediate rewriting in ISACaller into separate...
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2022-07-18 |
Luke Kenneth Casson... | move inputs in ISACaller into get_input()
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2022-07-18 |
Luke Kenneth Casson... | move debug remap to ISACaller.remap_debug()
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2022-07-18 |
Luke Kenneth Casson... | whitespace and function-return code-morphing in ISACaller
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2022-07-18 |
Luke Kenneth Casson... | move another function in ISACaller (check_write)
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2022-07-18 |
Luke Kenneth Casson... | begin function split in ISACaller
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2022-07-18 |
Luke Kenneth Casson... | remove duplicate code create ISACaller.advance_svstate_steps()
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2022-07-18 |
Luke Kenneth Casson... | add SUBVL (substep) support to PowerDecoder2 and to...
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2022-07-18 |
Luke Kenneth Casson... | add substep getter/setter to SVP64State
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2022-07-18 |
Luke Kenneth Casson... | rename SVSTATE.svstep to SVSTATE.substep to avoid
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2022-07-16 |
Luke Kenneth Casson... | simplify remapyield.py, skip shows the bit to be skipped
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2022-07-14 |
Luke Kenneth Casson... | got fed up of long list of ifs for manually decoded...
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2022-07-12 |
Luke Kenneth Casson... | add DX-Form FRS for fmvis
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2022-07-12 |
Luke Kenneth Casson... | add recognition of 0xNNN and 0bMMMM to sv/trans/svp64.py
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2022-07-12 |
Luke Kenneth Casson... | add FRS as destination to PowerDecoder2 DecodeOut
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2022-07-11 |
Luke Kenneth Casson... | add mm=1 svindex test, setting single targetted SVSHAPE
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2022-07-11 |
Luke Kenneth Casson... | fix issue in SelectableInt.__rsub__ causing truncation...
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2022-07-11 |
Luke Kenneth Casson... | fix issue in SelectableInt using slices involving SelectableInts
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2022-07-11 |
Luke Kenneth Casson... | compute 2nd svindex dimension using unsignee compare
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2022-07-10 |
Luke Kenneth Casson... | add yx svindex test, needed to compute size of 2nd dim
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2022-07-10 |
Luke Kenneth Casson... | Indexed SVSHAPE add bypass mode when dim sizes are 1
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2022-07-10 |
Luke Kenneth Casson... | add second svindex test, modulo 3
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2022-07-10 |
Luke Kenneth Casson... | fix svindex pseudocode, set large 2nd dim on nonskip
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2022-07-10 |
Luke Kenneth Casson... | fix svindex unit test, experiment setting dimensions
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2022-07-10 |
Luke Kenneth Casson... | fix SVSHAPE iterator for index case, stop deepcopy
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2022-07-10 |
Luke Kenneth Casson... | add new svindex sv.add test with arbitrary index map
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2022-07-10 |
Luke Kenneth Casson... | non-persistence enabled on svindex as well as svremap
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2022-07-10 |
Luke Kenneth Casson... | fix svindex pseudocode
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2022-07-09 |
Luke Kenneth Casson... | pass GPR to SVSHAPEs in ISACaller
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2022-07-09 |
Luke Kenneth Casson... | add gpr lookup in Indexed SVSHAPE iterator (no elwidths...
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2022-07-09 |
Luke Kenneth Casson... | rough unit test ahowing Index REMAP basically functional...
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2022-07-09 |
Luke Kenneth Casson... | add support for Indexed mode in SVSHAPE
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2022-07-09 |
Luke Kenneth Casson... | add storing of shape in requested SVSHAPE in svindex...
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2022-07-06 |
Luke Kenneth Casson... | move DX Form
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2022-07-06 |
Luke Kenneth Casson... | add first stub of svindex pseudocode
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2022-07-06 |
Luke Kenneth Casson... | add svindex to power_enums.py, minor_22.csv
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2022-07-06 |
Luke Kenneth Casson... | indentation on fields.txt to make it more markdown...
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2022-07-06 |
Luke Kenneth Casson... | convert Logical svp64_cases.py to new vector reg form
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2022-07-06 |
Luke Kenneth Casson... | convert ALU svp64_cases.py to new vector reg form
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2022-07-06 |
Luke Kenneth Casson... | converted test_caller_svstate.py to new reg format
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2022-07-05 |
Luke Kenneth Casson... | converted test_caller_svp64_matrix.py to new reg format
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2022-07-05 |
Luke Kenneth Casson... | converted test_caller_svp64_fp.py to new reg format
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2022-07-05 |
Luke Kenneth Casson... | converted test_caller_svp64_mapreduce.py to new reg...
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2022-07-05 |
Luke Kenneth Casson... | convert test_caller_setvl.py to new vector numbering...
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2022-07-05 |
Luke Kenneth Casson... | add "*%" and "*" vector-numbering convention
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2022-07-05 |
Luke Kenneth Casson... | add note about bug #884 new reg vector naming convention
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2022-07-05 |
Luke Kenneth Casson... | add regression test for completely borked value from...
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2022-07-05 |
Luke Kenneth Casson... | take deepcopy of regs passed in to avoid accidental...
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2022-07-02 |
Luke Kenneth Casson... | add setvl CTR tests, fix CTR mode
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2022-07-02 |
Luke Kenneth Casson... | fix setvl CTR mode
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2022-07-02 |
Luke Kenneth Casson... | setvl has new CTR mode, making room in encoding needed
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2022-06-30 |
Luke Kenneth Casson... | do CSV isatables explicitly in sv_analysis.py
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2022-06-30 |
Luke Kenneth Casson... | explicit output of opcode_regs_deduped in mdwn table...
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2022-06-28 |
Luke Kenneth Casson... | add recognition of "sv." to pysvp64asm
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2022-06-28 |
Luke Kenneth Casson... | remove qemu co-simulation, dump output expected results
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2022-06-26 |
Luke Kenneth Casson... | add predicate mask test svstep
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2022-06-26 |
Luke Kenneth Casson... | whoops svp64.py testing wrong variable on sv.svstep
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2022-06-26 |
Luke Kenneth Casson... | add predicated srcstep
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2022-06-26 |
Luke Kenneth Casson... | make svstep output srcstep/dststep, basically viota
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2022-06-26 |
Luke Kenneth Casson... | rename SVRM *field* to SVrm to avoid a name-clash with
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2022-06-26 |
Luke Kenneth Casson... | add test case for kaivb to jump to 0x2700
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2022-06-26 |
Luke Kenneth Casson... | add TrapTestCase for KAIVB
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2022-06-26 |
Luke Kenneth Casson... | hmm do expected state in rfid trap case
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2022-06-25 |
Luke Kenneth Casson... | correct input example for SOF case_3_bmask
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2022-06-25 |
Luke Kenneth Casson... | corrections to test cases, it is not quite
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2022-06-25 |
Luke Kenneth Casson... | update comments in av_cases.py test_1_bmask
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2022-06-25 |
Luke Kenneth Casson... | correct undefined in av.mdwn bmask
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2022-06-24 |
Luke Kenneth Casson... | add svindex XO field 101001
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2022-06-24 |
Luke Kenneth Casson... | rename mask to rmm in svindex
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2022-06-24 |
Luke Kenneth Casson... | rename mask field to rmm to avoid using "mask" in binutils
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2022-06-24 |
Luke Kenneth Casson... | add SVd to fields.txt (SVI-Form)
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2022-06-24 |
Luke Kenneth Casson... | add first bmask unit test
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2022-06-24 |
Luke Kenneth Casson... | invert mode-bits in bmask bm field
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2022-06-24 |
Luke Kenneth Casson... | bmask does not have Rc=1 variant
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2022-06-24 |
Luke Kenneth Casson... | sigh, bm not mode argument to bmask
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2022-06-24 |
Luke Kenneth Casson... | correct bmask conversion to binary (wrong instruction...
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2022-06-24 |
Luke Kenneth Casson... | add bmask to instruction list
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2022-06-24 |
Luke Kenneth Casson... | add to fields.txt for the svstep instruction
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2022-06-24 |
Luke Kenneth Casson... | add svindex SVI-Form to fields.txt
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2022-06-23 |
Luke Kenneth Casson... | add BM2-Form to power_enums.py
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2022-06-23 |
Luke Kenneth Casson... | else must be on separate line in pseudocode av.mdwn
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2022-06-23 |
Luke Kenneth Casson... | missing "Special Registers Altered" on av.mdwn
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2022-06-23 |
Luke Kenneth Casson... | add SPDX-License-Headers to CSV files
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2022-06-23 |
Luke Kenneth Casson... | add explanatory comments on minor_22.csv
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2022-06-23 |
Luke Kenneth Casson... | add comment-stripping to get_csv()
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2022-06-22 |
Luke Kenneth Casson... | add BM2 Form for (DRAFT) bmask instruction
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2022-06-22 |
Luke Kenneth Casson... | add another cprop test, experimenting
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2022-06-22 |
Luke Kenneth Casson... | add 2nd cprop test to see what happens
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2022-06-22 |
Luke Kenneth Casson... | expected number of instructions is 1 (therefore PC...
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2022-06-22 |
Luke Kenneth Casson... | argh horrible hack that does not work yet for fixing...
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2022-06-22 |
Luke Kenneth Casson... | add X-Form to svp64.py av opcode set
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2022-06-20 |
Luke Kenneth Casson... | add absolute-signed-diff next to absolute-unsigned...
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2022-06-20 |
Luke Kenneth Casson... | rename absadd[us] to absdac[ud]
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2022-06-19 |
Luke Kenneth Casson... | add absadds - signed accumulating add. DRAFT
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2022-06-19 |
Luke Kenneth Casson... | add absadd (unsigned) DRAFT
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2022-06-19 |
Luke Kenneth Casson... | add absolute-difference DRAFT
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2022-06-19 |
Luke Kenneth Casson... | add average-add DRAFT pseudocode and CSV
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2022-06-19 |
Luke Kenneth Casson... | add the rest of min/max DRAFT av opcodes
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