| 2022-10-01 |
Luke Kenneth Casson... | simplify setting default SVSHAPE SPRs to zero
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| 2022-09-30 |
Luke Kenneth Casson... | no need for ctr mode on sv.bc
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| 2022-09-30 |
Luke Kenneth Casson... | ctr mode not needed, just use unconditional CTR dec
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| 2022-09-30 |
Luke Kenneth Casson... | set srcstep/dststep to zero in StepLoop (ISACaller...
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| 2022-09-30 |
Luke Kenneth Casson... | add sv.bc vlset-inverted test
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| 2022-09-30 |
Luke Kenneth Casson... | comments/variables-cleanup
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| 2022-09-30 |
Luke Kenneth Casson... | add sv.bc vlset-inverted test
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| 2022-09-30 |
Luke Kenneth Casson... | add sv.bc/vs - VLset - test. truncates VL at the vector...
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| 2022-09-30 |
Luke Kenneth Casson... | add code-comments in variance_svp64_real.s on how to...
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| 2022-09-30 |
Luke Kenneth Casson... | add new sv.bc CTR-loop test, subtracts VL from CTR
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| 2022-09-30 |
Luke Kenneth Casson... | whitespace
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| 2022-09-30 |
Luke Kenneth Casson... | use regs variables in get_predint
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| 2022-09-30 |
Luke Kenneth Casson... | comments
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| 2022-09-29 |
Luke Kenneth Casson... | sv.adde not sv.addeo
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| 2022-09-29 |
Luke Kenneth Casson... | destination for maddedu and divmod2du for RS defaults...
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| 2022-09-29 |
Luke Kenneth Casson... | wowser, complex. implementing maddedu implicit RC/RS...
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| 2022-09-29 |
Luke Kenneth Casson... | add carry-roll-over-vector-mul-with-add (!) unit test
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| 2022-09-29 |
Luke Kenneth Casson... | comments
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| 2022-09-29 |
Luke Kenneth Casson... | add shift-left and shift-right scalar-to-vector tests
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| 2022-09-29 |
Luke Kenneth Casson... | update iterators in ISACaller, not used yet
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| 2022-09-28 |
Luke Kenneth Casson... | srcstep
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| 2022-09-28 |
Luke Kenneth Casson... | rename iterators init function
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| 2022-09-28 |
Luke Kenneth Casson... | redundant comment
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| 2022-09-28 |
Luke Kenneth Casson... | split out svstate update in ISACaller
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| 2022-09-28 |
Luke Kenneth Casson... | move failfirst check to separate function in ISACaller
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| 2022-09-28 |
Luke Kenneth Casson... | new revision of dsld
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| 2022-09-28 |
Luke Kenneth Casson... | add double-sld pseudocode, first draft
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| 2022-09-28 |
Luke Kenneth Casson... | add limit argument to MASK() helper
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| 2022-09-28 |
Luke Kenneth Casson... | add Z23 shift-mode fields.txt
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| 2022-09-28 |
Luke Kenneth Casson... | bugfix reset remaps and get subvl early
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| 2022-09-28 |
Luke Kenneth Casson... | comments on horizontal-or
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| 2022-09-28 |
Luke Kenneth Casson... | make matrix horizontal-remap example more generic
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| 2022-09-28 |
Luke Kenneth Casson... | add horizontal-or-reduction example that thoroughly...
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| 2022-09-28 |
Luke Kenneth Casson... | whoops VL incorrect in svshape markdown RTL for matrix...
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| 2022-09-27 |
Luke Kenneth Casson... | add unpack predicated unit test
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| 2022-09-27 |
Luke Kenneth Casson... | hack to check skipping on predicate being all-zero.
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| 2022-09-27 |
Luke Kenneth Casson... | sort out predicate loop-skip on pack/unpack
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| 2022-09-27 |
Luke Kenneth Casson... | adapt loops to include predicate-mask skipping in ISACaller
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| 2022-09-26 |
Luke Kenneth Casson... | skipping on maskedout elements de-restricted when substep...
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| 2022-09-26 |
Luke Kenneth Casson... | add first predicate-mask test of pack/unpack
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| 2022-09-26 |
Luke Kenneth Casson... | get pack/unpack tests to use sv.ori to copy sequence...
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commit | commitdiff | tree |
| 2022-09-26 |
Luke Kenneth Casson... | finally got pack/unpack working
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| 2022-09-26 |
Luke Kenneth Casson... | code-morph on loop-end detection in ISACaller
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| 2022-09-26 |
Luke Kenneth Casson... | explicit test of src/dststep end-condition in ISACaller...
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| 2022-09-26 |
Luke Kenneth Casson... | swap RA/RB so that RA|0 is used not RB|0
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| 2022-09-25 |
Luke Kenneth Casson... | have to sanity-check dz/zz after full qualifier-processing...
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| 2022-09-25 |
Luke Kenneth Casson... | add dz/sz assertion in is_bc mode
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| 2022-09-25 |
Luke Kenneth Casson... | whitespace
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| 2022-09-24 |
Luke Kenneth Casson... | move sea check to after all qualifiers are checked
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| 2022-09-24 |
Luke Kenneth Casson... | check variable rather than explicit == LDST_IDX
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| 2022-09-24 |
Luke Kenneth Casson... | add elstrided/sea on ldst_idx mode
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| 2022-09-24 |
Dmitry Selyutin | test_pysvp64dis: test ld/st idx SEA (simple)
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| 2022-09-24 |
Dmitry Selyutin | power_insn: support SEA specifier
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| 2022-09-24 |
Dmitry Selyutin | pysvp64asm: support /sea specifier
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| 2022-09-24 |
Dmitry Selyutin | consts: introduce SEA field
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| 2022-09-24 |
Dmitry Selyutin | pysvp64asm: fix comment layout
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| 2022-09-24 |
Luke Kenneth Casson... | set sv_mode to 0b01 in element-strided
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| 2022-09-24 |
Luke Kenneth Casson... | frickin frick
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commit | commitdiff | tree |
| 2022-09-24 |
Luke Kenneth Casson... | add assert to stop failfirst+sea
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| 2022-09-24 |
Luke Kenneth Casson... | add extra RC1 test, without VLI.
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commit | commitdiff | tree |
| 2022-09-24 |
Luke Kenneth Casson... | add RC1 support to ISACaller.
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| 2022-09-24 |
Luke Kenneth Casson... | add extra test_pysvp64dis.py test for ff=~RC1/vli mode
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| 2022-09-24 |
Luke Kenneth Casson... | whoops got mask/match test wrong in power_insn.py
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commit | commitdiff | tree |
| 2022-09-24 |
Luke Kenneth Casson... | comment inv,CRbit swap in decode_bo
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| 2022-09-23 |
Luke Kenneth Casson... | check svstate (vl) in failfirst test
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commit | commitdiff | tree |
| 2022-09-23 |
Luke Kenneth Casson... | grr annoying recurrence of svshape bug, mscale starts...
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commit | commitdiff | tree |
| 2022-09-23 |
Luke Kenneth Casson... | add data-dependent fail-first mode, Rc=1 variant not...
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commit | commitdiff | tree |
| 2022-09-23 |
Luke Kenneth Casson... | whoops consistent inversion of inv,CRbit was CRbit,inv
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commit | commitdiff | tree |
| 2022-09-23 |
Luke Kenneth Casson... | extra failfirst dis tests
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commit | commitdiff | tree |
| 2022-09-23 |
Luke Kenneth Casson... | remove barse-ackwardsness, use SelectableInt() in decode_bo
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commit | commitdiff | tree |
| 2022-09-23 |
Luke Kenneth Casson... | put back the barse-ackward decode_bo inversion of ...
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commit | commitdiff | tree |
| 2022-09-23 |
Luke Kenneth Casson... | remove need for explicit-hack for "pcdec." - rc column...
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commit | commitdiff | tree |
| 2022-09-23 |
Luke Kenneth Casson... | lots of really bad hacks, here
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| 2022-09-23 |
Luke Kenneth Casson... | fix/hack some bugs in prefix_codes_cases
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| 2022-09-23 |
Luke Kenneth Casson... | add (sigh) to the hack-job get_pdecode_idx_out2() in...
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| 2022-09-23 |
Luke Kenneth Casson... | change variablename dec2.use_svp64_fft to implicit_rs
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| 2022-09-23 |
Luke Kenneth Casson... | add match on implicit_rc for pcdec
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| 2022-09-23 |
Luke Kenneth Casson... | rename all "fft" variables in PowerDecoder2 because...
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| 2022-09-23 |
Luke Kenneth Casson... | add sv.maddld/mr unit test example with expected results
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| 2022-09-23 |
Luke Kenneth Casson... | add expected results for sv.maddld in openpower/test...
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| 2022-09-23 |
Luke Kenneth Casson... | reduce field name lengths (not in use)
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| 2022-09-23 |
Luke Kenneth Casson... | whoops offset-tracking on 3-in 2-out supposed to be...
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commit | commitdiff | tree |
| 2022-09-22 |
Luke Kenneth Casson... | add first (correctly-working) ctr-mode sv.bc test
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commit | commitdiff | tree |
| 2022-09-22 |
Luke Kenneth Casson... | comment need for waiting on binutils update
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commit | commitdiff | tree |
| 2022-09-21 |
Luke Kenneth Casson... | add series of double-stride options to test_caller_svp64_dct.py
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| 2022-09-21 |
Luke Kenneth Casson... | do not set striding on costables, keep them contiguous.
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| 2022-09-21 |
Luke Kenneth Casson... | scale-up svshape pseudo-code for striding in DCT/FFT
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| 2022-09-21 |
Luke Kenneth Casson... | fix dct/fft test-functions with new "scaling" parameter
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commit | commitdiff | tree |
| 2022-09-21 |
Luke Kenneth Casson... | missed setting zdim in svshape on DCT modes
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| 2022-09-21 |
Luke Kenneth Casson... | whoops stride already has +1 from SVSTATE class
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| 2022-09-21 |
Luke Kenneth Casson... | add SVzd to REMAP (svshape) "stride"
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| 2022-09-21 |
Luke Kenneth Casson... | add stride-multiplier for 2D DCT/FFT "in-place" offsets
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| 2022-09-21 |
Luke Kenneth Casson... | add sv.madd* to sv_analysis
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| 2022-09-20 |
Luke Kenneth Casson... | minor codemorph, whitespace
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| 2022-09-20 |
Luke Kenneth Casson... | sv.bc reclassified as RM-2P-1S by eliminating SPRs.
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| 2022-09-20 |
Luke Kenneth Casson... | remove messy string identification, use RM Mode from...
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| 2022-09-20 |
Luke Kenneth Casson... | add quick test and loooong test of pysvp64dis - branches...
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| 2022-09-20 |
Luke Kenneth Casson... | missed one sorting order in test_pysvp64dis.py
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| 2022-09-20 |
Luke Kenneth Casson... | sort specifiers in pysvp64dis in lexicographical order
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| 2022-09-20 |
Luke Kenneth Casson... | add two extra tests, sv.bc/m=r3/sz
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