2022-09-18 |
Luke Kenneth Casson... | correct COopFF3RM and CRopSimpleRM: extra sz field...
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2022-09-18 |
Luke Kenneth Casson... | add first attempt at swapping inner/outer vl/subvl...
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2022-09-18 |
Luke Kenneth Casson... | add new svstep mode setting up pack/unpack
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2022-09-18 |
Luke Kenneth Casson... | sigh, check length of string returned, if non-zero...
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2022-09-18 |
Luke Kenneth Casson... | sort out CR RM Mode (sz/dz bits moved, consistent)
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2022-09-18 |
Luke Kenneth Casson... | add comments (links to URLs) into power_insns.py for...
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2022-09-18 |
Luke Kenneth Casson... | remove f"" use simpler code, easier to read
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2022-09-18 |
Luke Kenneth Casson... | reverse decode_bo inv/eq/lt/le/etc. thing
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2022-09-18 |
Luke Kenneth Casson... | dumb. accidentally removed test-call
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2022-09-18 |
Luke Kenneth Casson... | add unit tests for Rc=1 ffirst/predicate-result
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2022-09-18 |
Luke Kenneth Casson... | comment principle behind new tables in power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | redo branch mode as a table, in power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | code-morph CR ops to table in power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | code-morph in power_insn.py - move table-search to...
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2022-09-18 |
Luke Kenneth Casson... | LDST_IDX Mode converted to table
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2022-09-18 |
Luke Kenneth Casson... | replace LDST_IMM mode with mask/value match table in...
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2022-09-18 |
Luke Kenneth Casson... | remove (invalid) NormalSaturationExtRM mode from power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | reduce NORMAL svp64 mode down to a mask-value search
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2022-09-18 |
Luke Kenneth Casson... | remove subvector mode from power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | adapt test_12_mr to /mrr and /mr modes, svm is gone...
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2022-09-18 |
Luke Kenneth Casson... | remove subvector mode from sv/trans/svp64.py
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2022-09-18 |
Luke Kenneth Casson... | change sv/trans/svp64.py source/dest elwidth assembler...
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2022-09-17 |
Luke Kenneth Casson... | add sat/satu test_12_sat to test_pysvp64dis.py
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2022-09-17 |
Luke Kenneth Casson... | whoops. mode-bits need to be put in MSB0 order. sigh
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2022-09-17 |
Luke Kenneth Casson... | add zz mode to sv/trans/svp64.py as a hack
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2022-09-17 |
Luke Kenneth Casson... | remove sv.setvl/pk/up/pu - these are all gone in favour...
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2022-09-17 |
Luke Kenneth Casson... | add MASK_SRC to power_insn.py (SVmask_src from enums)
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2022-09-17 |
Luke Kenneth Casson... | add SVmask_src enum, rename fields to EN and NO to...
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2022-09-17 |
Luke Kenneth Casson... | as a double-check sv_analysis new CSV column "SM" was...
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2022-09-17 |
Luke Kenneth Casson... | add a "SM" column into RM*.csv (and LDSTRM*.csv) identifying...
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2022-09-17 |
Luke Kenneth Casson... | add sv.add/ew=XX test to test_pysvp64dis.py
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2022-09-17 |
Luke Kenneth Casson... | remove pack/unpack modes from power_insn.py, they no...
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2022-09-17 |
Luke Kenneth Casson... | add vec2/3/4 test_pysvp64dis test
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2022-09-16 |
Luke Kenneth Casson... | comments on test_9_fptrans
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2022-09-15 |
Luke Kenneth Casson... | add minor_4.csv for maddld/maddhdu/maddhd and to insn_db.csv
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2022-09-15 |
Luke Kenneth Casson... | fix sprset mtspr/mfspr pseudocode with wrong definition of
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2022-09-13 |
Luke Kenneth Casson... | correct assrmbler in test_pysvpy4dis.py
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2022-09-13 |
Luke Kenneth Casson... | add first pack/unpack to ISACaller
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2022-09-13 |
Luke Kenneth Casson... | add setter/getter properties to SVP64State, minor code...
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2022-09-13 |
Luke Kenneth Casson... | remove pack/unpack from SVP64RMModeDecode, it is now...
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2022-09-13 |
Luke Kenneth Casson... | add batch of instructions from
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2022-09-12 |
Luke Kenneth Casson... | add hack overloaded meaning of destwid to be pack/unpack.
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2022-09-12 |
Luke Kenneth Casson... | add hphint and pack/unpack into SVSTATE SPR layout
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2022-09-12 |
Luke Kenneth Casson... | remove pack/unpack - now part of sv.setvl
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2022-09-12 |
Luke Kenneth Casson... | add rudimentary sv.setvl unit test to just check that...
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2022-09-12 |
Luke Kenneth Casson... | add sv.setvl to instructions as a major hack
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2022-09-12 |
Luke Kenneth Casson... | split out setvl from sv.setvl test in test_pysvp64dis.py
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2022-09-12 |
Luke Kenneth Casson... | add extra tests "add." "addo" etc. to test_pysvp64dis.py
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2022-09-12 |
Luke Kenneth Casson... | demo that "setvl." is not reconstructed with Rc=1 mode
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2022-09-12 |
Luke Kenneth Casson... | some weird moving of opcodes around, probably because...
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2022-09-12 |
Luke Kenneth Casson... | skip addpcis for now, needs properly qualifying
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2022-09-11 |
Luke Kenneth Casson... | add new CRIn2Sel for later, for getting rid of CRInSel...
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2022-09-11 |
Luke Kenneth Casson... | BFT does not exist
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2022-09-11 |
Luke Kenneth Casson... | add sv.isel 12,2,3,*99 test to test_pysvp64dis.py
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2022-09-11 |
Luke Kenneth Casson... | add some CR3 pysvp64dis.py tests, sv.crand
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2022-09-11 |
Luke Kenneth Casson... | add sv.isel asm-disasm tests to test_pysvp64dis.py
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2022-09-11 |
Luke Kenneth Casson... | add missing addpcis to power_enums.py and minor_19.csv
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2022-09-11 |
Luke Kenneth Casson... | convert minor_19 to bitpattern (for adding addpcis)
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2022-09-11 |
Luke Kenneth Casson... | whoops lsbshf=2 for CR5
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2022-09-11 |
Luke Kenneth Casson... | whoops missed lsb-shift parameter
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2022-09-11 |
Luke Kenneth Casson... | add comments into CR5Operand class
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2022-09-11 |
Luke Kenneth Casson... | add CR5Operand and CR3Operand to power_insns.py
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2022-09-10 |
Luke Kenneth Casson... | huhn? addpcis converts to .long? huhn?
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2022-09-10 |
Luke Kenneth Casson... | fix issue with pysvp64dis.py load() reading from stdin
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2022-09-10 |
Luke Kenneth Casson... | whitespace cleanup
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2022-09-10 |
Luke Kenneth Casson... | add quine-mckluskey algorithm
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2022-09-09 |
Luke Kenneth Casson... | add fishmv fmvis addpcis instructions to test_pysvp64dis.py
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2022-09-09 |
Luke Kenneth Casson... | add subtests
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2022-09-09 |
Luke Kenneth Casson... | hooray got test_pysvp64dis.py working with new Verbosity...
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2022-09-09 |
Luke Kenneth Casson... | add seek/tell on load in pysvp64dis so that generator...
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2022-09-09 |
Luke Kenneth Casson... | add "short" argument (TODO pick better name) to pysvp64dis
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2022-09-09 |
Luke Kenneth Casson... | add pysvp64dis tester
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2022-09-09 |
Luke Kenneth Casson... | extend short down into rest of disassembly
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2022-09-09 |
Luke Kenneth Casson... | add "short" form of instruction - not output hex-encoding
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2022-09-09 |
Luke Kenneth Casson... | "D" of fishmv RT,D has to be done as a custom field
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2022-09-09 |
Luke Kenneth Casson... | add default arg byteorder=LITTLE to pysvp64dis
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2022-09-09 |
Luke Kenneth Casson... | added missing RA RB RT to TLI-Form fields.txt
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2022-09-08 |
Luke Kenneth Casson... | whitespace
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2022-09-08 |
Luke Kenneth Casson... | rename svshape and svoffset fields
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2022-09-07 |
Luke Kenneth Casson... | add fcpsgn parallel reduction test
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2022-09-07 |
Luke Kenneth Casson... | whoops forgot to strip "NN/NN=insn" in power_svp64.py
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2022-09-07 |
Luke Kenneth Casson... | add 2nd parallel prefix test, this time subtract (non...
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2022-09-06 |
Luke Kenneth Casson... | add first functional confirmed unit test for parallel...
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2022-09-06 |
Luke Kenneth Casson... | REMAP parallel-reduce:
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2022-09-06 |
Luke Kenneth Casson... | removing two unused fields (E) which somehow
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2022-09-06 |
Luke Kenneth Casson... | add dummy fixedsync.mdwn pseudocode for lwarx/stbcx...
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2022-09-06 |
Luke Kenneth Casson... | sort out demo of remap_preduce_yield.py
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2022-09-06 |
Luke Kenneth Casson... | add first version of parallel reduction yield
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2022-09-05 |
Luke Kenneth Casson... | add a new log option to pysvp64dis and make it a command...
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2022-09-05 |
Luke Kenneth Casson... | use log function for warnings about .mdwn files in...
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2022-09-05 |
Luke Kenneth Casson... | move reading of os.environ out of a global which prohibits
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2022-09-05 |
Luke Kenneth Casson... | remove parallel-reduction mode from decoder and sv...
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2022-09-05 |
Luke Kenneth Casson... | rename remap_debug to remap_set_steps
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2022-09-05 |
Luke Kenneth Casson... | please do not use format-specifiers
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2022-09-05 |
Luke Kenneth Casson... | remove yet more f"" specifiers
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2022-09-05 |
Luke Kenneth Casson... | removing use of format. please do not use format
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2022-09-05 |
Luke Kenneth Casson... | rename "PARALLEL" enums to "PTREDUCE" - parallel tree...
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2022-09-04 |
Luke Kenneth Casson... | add detection of Parallel-Reduction Mode into SVP64RMModeDecode
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2022-09-04 |
Luke Kenneth Casson... | add parallel-reduction (subvl=0) in sv/trans/svp64.py
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2022-09-04 |
Luke Kenneth Casson... | whoops forgot to write maxvl in PowerDecoder2
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