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thanks to daveshah, added simulation of dram
2020-08-10 Samuel A. Falvo IIWIP!! Make MUL pipeline proof run again.
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2020-08-04 Samuel A. Falvo IIRemove XXX; this seems done otherwise.
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2020-08-03 Samuel A. Falvo IIWIP: check MB > ME and select mask appropriately
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2020-07-31 Samuel A. Falvo IIWIP: more debugging signals for inspection
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2020-07-30 Samuel A. Falvo IIWIP: rlwinm/rlwnm/rlwimi-type proofs
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2020-07-26 Samuel A. Falvo IIMTMSR(D) properties.
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2020-07-24 Samuel A. Falvo IIProperties for MFMSR
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2020-07-24 Samuel A. Falvo IIReorganize code layout
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2020-07-24 Samuel A. Falvo IIWIP: SC properties more closely match doc'd behavior
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2020-07-24 Samuel A. Falvo IIWIP: addressing code review, restoring proofs, etc.
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2020-07-24 Samuel A. Falvo IIRefactorin of common code
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2020-07-24 Samuel A. Falvo IIAddress code review comments
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2020-07-22 Samuel A. Falvo IIComplete FV properties for OP_TRAP instructions.
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2020-07-22 Samuel A. Falvo IIPEP8 compliance
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2020-07-21 Samuel A. Falvo IICompleted SC FV properties
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2020-07-21 Samuel A. Falvo IIRefine properties to comply with spec
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2020-07-21 Samuel A. Falvo IIFix where msr_i gets its value from
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2020-07-21 Samuel A. Falvo IIMerge in recent updates to TRAP FV properties.
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2020-07-20 Samuel A. Falvo IIRework SC properties to conform to style
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2020-07-20 Samuel A. Falvo IIFormal properties for RFID.
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2020-07-18 Samuel A. Falvo IIWIP: FV failing for unknown reasons.
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2020-07-18 Samuel A. Falvo IIFailing test: fast1/fast2 vs srr0/srr1? on trap pipe
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2020-07-18 Samuel A. Falvo IIforgot to clean up workspace in source
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2020-07-18 Samuel A. Falvo IIFV props for SC instruction
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2020-07-17 Samuel A. Falvo IIFirst FV property for trap unit
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2020-07-17 Samuel A. Falvo IIFlesh out SPR-related FV properties.
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2020-07-14 Samuel A. Falvo IISPR: FV that should fail currently passes
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