| 2022-10-27 |
Luke Kenneth Casson... | add test for identifying [expr] * name in parser
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| 2022-10-27 |
Luke Kenneth Casson... | https://bugs.libre-soc.org/show_bug.cgi?id=966#c4
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| 2022-10-25 |
Luke Kenneth Casson... | code-comments on divmod2du and maddedu are wrong
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| 2022-10-25 |
Luke Kenneth Casson... | comments
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| 2022-10-25 |
Luke Kenneth Casson... | shadd pseudocode cleanup
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| 2022-10-24 |
Luke Kenneth Casson... | add maxs. combined with cmp capability
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| 2022-10-23 |
Luke Kenneth Casson... | use svshape2 instead of svindex for the 4th shape
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| 2022-10-22 |
Luke Kenneth Casson... | add extra pysvp64dis tests for divmod2du and maddedu
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| 2022-10-22 |
Luke Kenneth Casson... | argh, extremely annoying: 4-operand dsld/dsrd is not...
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| 2022-10-22 |
Luke Kenneth Casson... | remove redundant case_dsrd3
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| 2022-10-22 |
Luke Kenneth Casson... | bigint shuffle
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| 2022-10-21 |
Luke Kenneth Casson... | code-comments
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| 2022-10-21 |
Luke Kenneth Casson... | add 2nd outer loop, CTR 2 rounds, in chacha20 test
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| 2022-10-21 |
Luke Kenneth Casson... | move chacha20 to separate test, set/get masked regs...
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| 2022-10-21 |
Luke Kenneth Casson... | move HASK, ROTL32, ROTL64, MASK32, into helper class
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| 2022-10-21 |
Luke Kenneth Casson... | use XLEN/2 for ROTL32 in fixedshift.mdwn
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| 2022-10-20 |
Luke Kenneth Casson... | comments
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| 2022-10-20 |
Luke Kenneth Casson... | add first chacha20 round test
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| 2022-10-19 |
Luke Kenneth Casson... | TODO, sort out remap indices order
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commit | commitdiff | tree |
| 2022-10-16 |
Luke Kenneth Casson... | debug print correction
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| 2022-10-16 |
Luke Kenneth Casson... | sigh, have to use yield from on get_out_map()
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| 2022-10-16 |
Luke Kenneth Casson... | rewrite get_idx_out2 in ISACaller to split out
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| 2022-10-16 |
Luke Kenneth Casson... | rewrite get_idx_out in ISACaller to split out
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| 2022-10-16 |
Luke Kenneth Casson... | add unit test showing two svindex calls, found bugs,
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| 2022-10-16 |
Luke Kenneth Casson... | code-shuffle, rework get_idx_in() to separate out the...
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| 2022-10-14 |
Luke Kenneth Casson... | whoops missed an update MEM(EA...) in pifixedstore
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commit | commitdiff | tree |
| 2022-10-14 |
Luke Kenneth Casson... | add max-with-getting-index-of vertical-first loop example
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| 2022-10-14 |
Luke Kenneth Casson... | SVP64RMModeDecode detects Post-Inc LDST-imm mode
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| 2022-10-14 |
Luke Kenneth Casson... | correct comments
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| 2022-10-14 |
Luke Kenneth Casson... | add in zeroing on test strncpy
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| 2022-10-14 |
Luke Kenneth Casson... | remove unneeded svstate from test
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| 2022-10-14 |
Luke Kenneth Casson... | add strncpy example - 6 instructions
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| 2022-10-14 |
Luke Kenneth Casson... | add sv.stwu/pi example in test_sv_load_store_postinc
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| 2022-10-14 |
Luke Kenneth Casson... | add ld/st-immediate "post-inc" mode support. unit test...
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| 2022-10-14 |
Luke Kenneth Casson... | add /pi to sv/trans/svp64.py and power_insns.py
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| 2022-10-14 |
Luke Kenneth Casson... | add new LD-Immediate Post constants
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| 2022-10-12 |
Luke Kenneth Casson... | add sv.divmod2du test, inverse of the sv.madded
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| 2022-10-12 |
Luke Kenneth Casson... | comments clean-up on bigint big-mul case
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| 2022-10-11 |
Luke Kenneth Casson... | whoops ea not ra in pifixedstore.mdwn
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commit | commitdiff | tree |
| 2022-10-11 |
Luke Kenneth Casson... | add Post-increment version of fixedstore.mdwn
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| 2022-10-11 |
Luke Kenneth Casson... | add asciidump option to Mem class
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| 2022-10-11 |
Luke Kenneth Casson... | whoops zero-error on masked-out
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| 2022-10-11 |
Luke Kenneth Casson... | add experimental post-increment fixedload pseudocode
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| 2022-10-10 |
Luke Kenneth Casson... | add elwidth overrides on Indexed REMAP, 8-bit example...
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| 2022-10-10 |
Luke Kenneth Casson... | add elwidth overrides to get_idx_out2
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commit | commitdiff | tree |
| 2022-10-08 |
Luke Kenneth Casson... | fix format in debug log
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commit | commitdiff | tree |
| 2022-10-08 |
Luke Kenneth Casson... | forgot to add offset on GPR() get
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| 2022-10-08 |
Luke Kenneth Casson... | add elwidth overrides on destination (write) in ISACaller.
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| 2022-10-08 |
Luke Kenneth Casson... | split out base,offset in register decoding for elwidth...
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| 2022-10-08 |
Luke Kenneth Casson... | add 8-bit elwidth alu svp64 case
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| 2022-10-08 |
Luke Kenneth Casson... | add rfscv to major_19.csv, add test_pysvp64dis.py unit...
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| 2022-10-08 |
Luke Kenneth Casson... | drat
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| 2022-10-08 |
Luke Kenneth Casson... | add sc and scv support after moving from major.csv...
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| 2022-10-08 |
Luke Kenneth Casson... | vector name "RSp" not recognised in sv.stq, added as...
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| 2022-10-08 |
Luke Kenneth Casson... | add stq to CSV files and unit test to test_pysvp64dis.py
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| 2022-10-08 |
Luke Kenneth Casson... | separate out DQ and DS to separate custom_immediates
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| 2022-10-08 |
Luke Kenneth Casson... | use new base-class EXTSOperand, derive from ImmediateOperand
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commit | commitdiff | tree |
| 2022-10-08 |
Luke Kenneth Casson... | convert TargetAddrOperand to base class EXTSOperand
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commit | commitdiff | tree |
| 2022-10-08 |
Luke Kenneth Casson... | add lq and CONST_DQ
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commit | commitdiff | tree |
| 2022-10-08 |
Luke Kenneth Casson... | restore tests, accidentally disabled
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| 2022-10-08 |
Luke Kenneth Casson... | add CY operand to fields.txt, in Z23-Form
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| 2022-10-08 |
Luke Kenneth Casson... | add XER bits to register enums
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| 2022-10-08 |
Luke Kenneth Casson... | add addex to csv and sv_analysis db. also needs CryIn...
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| 2022-10-08 |
Luke Kenneth Casson... | misnamed instruction, lfiwzx
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| 2022-10-07 |
Luke Kenneth Casson... | more work on inssort. add useful reg-dump in ISACaller
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commit | commitdiff | tree |
| 2022-10-06 |
Luke Kenneth Casson... | nope. failfirst needs to always save the result, but...
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| 2022-10-06 |
Luke Kenneth Casson... | fix fail-first to exclude failed element in VLi=0 mode
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| 2022-10-06 |
Luke Kenneth Casson... | sort out CROPs fail-first in ISACaller. needed to...
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| 2022-10-06 |
Luke Kenneth Casson... | make fail-first cope with sv.cmp which uses CR[BF]
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| 2022-10-06 |
Luke Kenneth Casson... | add insert sort svp64 test
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| 2022-10-06 |
Luke Kenneth Casson... | search for BF in registers to over-ride Vector lookup...
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| 2022-10-06 |
Luke Kenneth Casson... | starting to add sv.cmp support and failfirst, had to add
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| 2022-10-06 |
Luke Kenneth Casson... | add PredicateBaseRM decode to CR Ops Simple mode as...
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| 2022-10-06 |
Luke Kenneth Casson... | add vli mode to ff=5 CR ops
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| 2022-10-06 |
Luke Kenneth Casson... | whoops must only be PredicateBaseRM in CROpFF5RM
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| 2022-10-06 |
Luke Kenneth Casson... | add sv.cmp (ffirst-5) decode/encode asm support
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commit | commitdiff | tree |
| 2022-10-06 |
Luke Kenneth Casson... | slightly different crops failfirst mode bits
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commit | commitdiff | tree |
| 2022-10-06 |
Luke Kenneth Casson... | add sv.cmp and try fail-first test_pysvp64dist.py
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commit | commitdiff | tree |
| 2022-10-02 |
Luke Kenneth Casson... | remove complaints about standard Cray-style Vectors...
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| 2022-10-02 |
Luke Kenneth Casson... | comments for why preinc is called for svstep
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| 2022-10-02 |
Luke Kenneth Casson... | comment out selectableint getitem logs
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commit | commitdiff | tree |
| 2022-10-01 |
Luke Kenneth Casson... | skip svstate_pre_inc on svremap
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| 2022-10-01 |
Luke Kenneth Casson... | no svstate instruction
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| 2022-10-01 |
Luke Kenneth Casson... | svstep calls SVSTATE_NEXT so needs svstate_pre_inc
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commit | commitdiff | tree |
| 2022-10-01 |
Luke Kenneth Casson... | remove special case from setvl calling SVSTATE_NEXT,
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commit | commitdiff | tree |
| 2022-10-01 |
Luke Kenneth Casson... | replacing setvl-svstep with just svstep
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commit | commitdiff | tree |
| 2022-10-01 |
Luke Kenneth Casson... | replacing setvl-svstep with just svstep
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commit | commitdiff | tree |
| 2022-10-01 |
Luke Kenneth Casson... | replacing setvl-svstep with just svstep
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commit | commitdiff | tree |
| 2022-10-01 |
Luke Kenneth Casson... | comments
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commit | commitdiff | tree |
| 2022-10-01 |
Luke Kenneth Casson... | comments
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commit | commitdiff | tree |
| 2022-10-01 |
Luke Kenneth Casson... | minor cleanup in ISACaller on result handling
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commit | commitdiff | tree |
| 2022-10-01 |
Luke Kenneth Casson... | simplify ISACaller execute_one
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| 2022-10-01 |
Luke Kenneth Casson... | simplify setting default SVSHAPE SPRs to zero
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commit | commitdiff | tree |
| 2022-09-30 |
Luke Kenneth Casson... | no need for ctr mode on sv.bc
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commit | commitdiff | tree |
| 2022-09-30 |
Luke Kenneth Casson... | ctr mode not needed, just use unconditional CTR dec
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| 2022-09-30 |
Luke Kenneth Casson... | set srcstep/dststep to zero in StepLoop (ISACaller...
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commit | commitdiff | tree |
| 2022-09-30 |
Luke Kenneth Casson... | add sv.bc vlset-inverted test
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commit | commitdiff | tree |
| 2022-09-30 |
Luke Kenneth Casson... | comments/variables-cleanup
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commit | commitdiff | tree |
| 2022-09-30 |
Luke Kenneth Casson... | add sv.bc vlset-inverted test
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| 2022-09-30 |
Luke Kenneth Casson... | add sv.bc/vs - VLset - test. truncates VL at the vector...
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