2019-08-20 |
Luke Kenneth Casson... | remove delayed part ops, now inside AddReduceSingle
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2019-08-20 |
Luke Kenneth Casson... | add missing arg part_ops to unit test
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2019-08-20 |
Luke Kenneth Casson... | do not need delayed_part_ops
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2019-08-20 |
Luke Kenneth Casson... | pass in part_ops to AddReduce, so that it is syncd...
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2019-08-20 |
Luke Kenneth Casson... | whitespace
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2019-08-20 |
Luke Kenneth Casson... | removing recursion from AddReduce
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2019-08-20 |
Luke Kenneth Casson... | update explanatory comments
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2019-08-20 |
Luke Kenneth Casson... | MaskedFullAdder performs ANDing in a group by pre-shifting...
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2019-08-20 |
Luke Kenneth Casson... | split "actionable" part of AddReduce out from "recursive...
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2019-08-20 |
Luke Kenneth Casson... | update comments
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2019-08-20 |
Luke Kenneth Casson... | add to docstrings in PartitionedAdder
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2019-08-20 |
Luke Kenneth Casson... | add to docstrings in PartitionedAdder
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2019-08-20 |
Luke Kenneth Casson... | create a new "MaskedFullAdder" class, which performs...
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2019-08-20 |
Luke Kenneth Casson... | add docstrings / comments to PartitionedAdder
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2019-08-20 |
Luke Kenneth Casson... | spelling mistake $i instead of %i
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2019-08-19 |
Luke Kenneth Casson... | rename temporary value
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2019-08-19 |
Luke Kenneth Casson... | temporary ~pbs
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2019-08-19 |
Luke Kenneth Casson... | name LSBNotTerm submodules after bitwidth
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2019-08-19 |
Luke Kenneth Casson... | use new split-out LSBNotTerm module
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2019-08-19 |
Luke Kenneth Casson... | split out LSB and neg term to separate module
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2019-08-19 |
Luke Kenneth Casson... | docstrings, fix syntax
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2019-08-19 |
Luke Kenneth Casson... | explain Part module
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2019-08-19 |
Luke Kenneth Casson... | add module docstrings to (new) multiply classes
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2019-08-19 |
Luke Kenneth Casson... | rename fo submodule to "finalout"
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2019-08-18 |
Luke Kenneth Casson... | nope - yosys graph not efficient enough
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2019-08-18 |
Luke Kenneth Casson... | use switch instead of mux, more obvious what is happening
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2019-08-18 |
Luke Kenneth Casson... | add comment about simulation bugs
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2019-08-18 |
Luke Kenneth Casson... | Revert "make variables local"
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2019-08-18 |
Luke Kenneth Casson... | add TODO code, needs sorting
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2019-08-18 |
Luke Kenneth Casson... | merge Term into ProductTerm
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2019-08-17 |
Luke Kenneth Casson... | make variables local
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2019-08-17 |
Luke Kenneth Casson... | argh horrible nmigen bug on use of sync involving modules
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2019-08-17 |
Luke Kenneth Casson... | weird bug - some rename experiments
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2019-08-17 |
Luke Kenneth Casson... | FinalOutput module
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2019-08-17 |
Luke Kenneth Casson... | rename variables
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2019-08-17 |
Luke Kenneth Casson... | put signs through Signs module
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2019-08-17 |
Luke Kenneth Casson... | move local variables
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2019-08-17 |
Luke Kenneth Casson... | remove redundant code
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2019-08-17 |
Luke Kenneth Casson... | or data together through a module (reduce top-level...
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2019-08-17 |
Luke Kenneth Casson... | create array of ProductTerms - reduces graphviz MASSIVELY
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2019-08-17 |
Luke Kenneth Casson... | move intermediate output to new module
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2019-08-17 |
Luke Kenneth Casson... | delayed_part_ops is a local
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2019-08-17 |
Luke Kenneth Casson... | add name to Term output
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2019-08-17 |
Luke Kenneth Casson... | move bit selection into ProductTerms: simplifies graph
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2019-08-17 |
Luke Kenneth Casson... | split out "Parts" to separate module
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2019-08-17 |
Luke Kenneth Casson... | move remaining 4 terms, use Term class
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2019-08-17 |
Luke Kenneth Casson... | derive new class Term and ProductTerm
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2019-08-17 |
Luke Kenneth Casson... | use Cat (again) on intermediate values
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2019-08-17 |
Luke Kenneth Casson... | simplify sign/term bits using Cat
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2019-08-17 |
Luke Kenneth Casson... | move product terms to separate module (Term)
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2019-08-17 |
Luke Kenneth Casson... | add new Terms class, get part_pts into intermediary
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2019-08-17 |
Luke Kenneth Casson... | part replaced by bit_select
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2019-08-17 |
Luke Kenneth Casson... | whoops, a-enabled and b-enabled swapped
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2019-08-17 |
Luke Kenneth Casson... | stash intermediaries for output into temp signals
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2019-08-17 |
Luke Kenneth Casson... | assignment in Cat wrong way round
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2019-08-17 |
Luke Kenneth Casson... | use reset_less
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2019-08-17 |
Luke Kenneth Casson... | whoops use already-used list
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2019-08-17 |
Luke Kenneth Casson... | boolean logic inversion, x = ~a & ~b & ~c ==> ~(a ...
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2019-08-17 |
Luke Kenneth Casson... | concatenate parts using list then Cat() - again, simplifies...
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2019-08-17 |
Luke Kenneth Casson... | a_enabled and b_enabled into signals
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2019-08-17 |
Luke Kenneth Casson... | add intermediate values as signals
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2019-08-17 |
Luke Kenneth Casson... | move variable to pyi file
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2019-08-17 |
Luke Kenneth Casson... | store mask in intermediary
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2019-08-17 |
Luke Kenneth Casson... | use Cat instead of for-loops: cleans up the yosys graphviz...
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2019-08-17 |
Luke Kenneth Casson... | move typing to multiplier.pyi
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2019-08-17 |
Luke Kenneth Casson... | add partitioned multiplier/adder
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2019-08-17 |
Luke Kenneth Casson... | rename fp div classes and submodule
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2019-08-16 |
Luke Kenneth Casson... | test flipping of latchable pipeline stage between sync...
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2019-08-16 |
Luke Kenneth Casson... | update comments
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commit | commitdiff | tree |
2019-08-15 |
Luke Kenneth Casson... | set up data in temporaries correctly
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2019-08-15 |
Luke Kenneth Casson... | update MaskCancellable docstrings
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2019-08-15 |
Luke Kenneth Casson... | add dynamic comb/sync mode to MaskCancellable
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2019-08-15 |
Luke Kenneth Casson... | whitespace
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commit | commitdiff | tree |
2019-08-14 |
Luke Kenneth Casson... | debugging feedback pipe
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commit | commitdiff | tree |
2019-08-12 |
Luke Kenneth Casson... | fix syntax errors in fmac conversion
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2019-08-11 |
Luke Kenneth Casson... | increase number of fpmul operands to 3
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2019-08-11 |
Luke Kenneth Casson... | restore old Multi-in/out behaviour
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2019-08-11 |
Luke Kenneth Casson... | start converting hardfloat-verilog fmac to nmigen
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2019-08-11 |
Luke Kenneth Casson... | start converting hardfloat-verilog fmac to nmigen
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commit | commitdiff | tree |
2019-08-10 |
Luke Kenneth Casson... | start converting hardfloat-verilog fmac to nmigen
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2019-08-10 |
Luke Kenneth Casson... | {x}{y} in verilog means x occurrences of y
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commit | commitdiff | tree |
2019-08-10 |
Luke Kenneth Casson... | {x}{y} in verilog means x occurrences of y
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commit | commitdiff | tree |
2019-08-10 |
Luke Kenneth Casson... | start converting hardfloat-verilog fmac to nmigen
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commit | commitdiff | tree |
2019-08-10 |
Luke Kenneth Casson... | start converting hardfloat-verilog fmac to nmigen
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2019-08-07 |
Luke Kenneth Casson... | route-back experimentation
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2019-08-07 |
Luke Kenneth Casson... | add experimental feedback pipe test
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2019-08-07 |
Luke Kenneth Casson... | respect Ready/Valid signalling (stall capability) in...
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2019-08-06 |
Luke Kenneth Casson... | add mask cancellation to FPDIV and to fpmux unit test
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2019-08-05 |
Luke Kenneth Casson... | multiply mask width for concurrent pipeline
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2019-08-05 |
Luke Kenneth Casson... | hack to set predicate mask (if it exists)
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2019-08-05 |
Luke Kenneth Casson... | whoops inherit from MaskCancellable not SimpleHandshake
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2019-08-04 |
Luke Kenneth Casson... | added maskwidth and dynamic use of MaskCancellable...
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2019-08-03 |
Luke Kenneth Casson... | only pass on the uncancelled mask bits
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2019-08-03 |
Luke Kenneth Casson... | test actual cancellation mask (works)
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2019-08-03 |
Luke Kenneth Casson... | add 2 extra stages to cancel test
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2019-08-03 |
Luke Kenneth Casson... | give names to muxer submodules
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2019-08-03 |
Luke Kenneth Casson... | pass on stop bits as well
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2019-08-03 |
Luke Kenneth Casson... | concatenate mask bits on fan-in, split on fan-out
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2019-08-03 |
Luke Kenneth Casson... | add maskable in/out cancellable test
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2019-08-03 |
Luke Kenneth Casson... | add in cancelmask
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