2018-11-28 |
Jacob Lifshay | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2018-11-28 |
Jacob Lifshay | add instructions for using iverilog |
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2018-11-28 |
Luke Kenneth... | handle_trap returns values that get manually transferre... |
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2018-11-27 |
Luke Kenneth... | remove trap_handled, remove w_en |
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2018-11-27 |
Luke Kenneth... | experiment with separate cpu handle csr module |
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2018-11-27 |
Luke Kenneth... | move handle trap out to separate module, bit messy |
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2018-11-27 |
Luke Kenneth... | split out cpu handle_trap |
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2018-11-27 |
Luke Kenneth... | split out cpu_mip to separate module |
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2018-11-27 |
Luke Kenneth... | split out cpu_mie into separate module |
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2018-11-27 |
Luke Kenneth... | split out MStatus to separate module |
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2018-11-27 |
Luke Kenneth... | split cpu loadstore calc out |
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2018-11-26 |
Luke Kenneth... | break out cpu load/store calculation into separate... |
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2018-11-26 |
Luke Kenneth... | move get_fetch_action to separate verilog file |
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2018-11-26 |
Luke Kenneth... | prepare get_fetch_action for move to separate module |
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2018-11-26 |
Luke Kenneth... | whoops missed out branch_taken logic from fetch_action |
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2018-11-26 |
Luke Kenneth... | rename register varnames to regfile |
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2018-11-26 |
Luke Kenneth... | reorganise cpu regfile, to separate module, with 2R1W... |
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2018-11-26 |
Luke Kenneth... | complete csrs |
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2018-11-26 |
Luke Kenneth... | add misa and mstatus csrs |
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2018-11-26 |
Luke Kenneth... | add clock domains doc to README |
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2018-11-26 |
Luke Kenneth... | start adding csrs |
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2018-11-26 |
Luke Kenneth... | move stuff to MInfo |
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2018-11-26 |
Luke Kenneth... | split CSR to separate class |
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2018-11-26 |
Luke Kenneth... | add handle_main |
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2018-11-26 |
Luke Kenneth... | add counters (TODO) |
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2018-11-26 |
Luke Kenneth... | add csr_is_valid |
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2018-11-26 |
Luke Kenneth... | start on csr op valid |
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2018-11-26 |
Luke Kenneth... | CSR decoding |
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2018-11-26 |
Luke Kenneth... | add handle_trap |
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2018-11-26 |
Luke Kenneth... | add handle_trap |
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2018-11-26 |
Luke Kenneth... | add handle trap |
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2018-11-26 |
Luke Kenneth... | complete get_fetch_action, move to class Fetch |
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2018-11-26 |
Luke Kenneth... | start converting get_fetch_action |
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2018-11-26 |
Luke Kenneth... | fetch output state class |
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2018-11-26 |
Luke Kenneth... | create Fetch class |
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2018-11-26 |
Luke Kenneth... | add get_fetch_action ready for conversion |
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2018-11-25 |
Luke Kenneth... | add to README |
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2018-11-25 |
Luke Kenneth... | class-ify fetch_action |
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2018-11-25 |
Luke Kenneth... | add mstatus, mip and vendor/arch/mimpl |
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2018-11-25 |
Luke Kenneth... | add MISA and MIE |
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2018-11-25 |
Luke Kenneth... | add more logic and mstatus |
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2018-11-25 |
Luke Kenneth... | calculate lui_auipc |
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2018-11-25 |
Luke Kenneth... | minor reorg, add alu |
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2018-11-25 |
Luke Kenneth... | minor reorg, add alu |
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2018-11-25 |
Luke Kenneth... | convert loaded value |
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2018-11-25 |
Luke Kenneth... | load value |
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2018-11-25 |
Luke Kenneth... | more cpu logic |
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2018-11-25 |
Luke Kenneth... | small cpu reorg |
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2018-11-25 |
Luke Kenneth... | add load/store misaligned |
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2018-11-25 |
Luke Kenneth... | add CPU decoder instance |
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2018-11-25 |
Luke Kenneth... | add cpuFetchStage instance |
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2018-11-25 |
Luke Kenneth... | adding call out to cpu_memory_interface verilog module... |
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2018-11-24 |
Luke Kenneth... | stub cpu.py |
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2018-11-24 |
Luke Kenneth... | tidyup |
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2018-11-24 |
Luke Kenneth... | document decode functions |
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2018-11-24 |
Luke Kenneth... | tidyup |
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2018-11-24 |
Luke Kenneth... | no immediate constant, make 32-bit wide |
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2018-11-24 |
Luke Kenneth... | big reorg, class-ify constants |
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2018-11-24 |
Luke Kenneth... | big reorg, class-ify constants |
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2018-11-24 |
Luke Kenneth... | cleanup cpu_decode.py |
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2018-11-23 |
Luke Kenneth... | more cpu decode conversion |
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2018-11-23 |
Luke Kenneth... | add cpu decode cases |
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2018-11-23 |
Luke Kenneth... | add cpu_decoder.py |
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2018-11-23 |
Luke Kenneth... | add riscvdefs.py |
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2018-11-23 |
Luke Kenneth... | remove sync set output_state |
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2018-11-23 |
Luke Kenneth... | sort out memory_interface_fetch_address |
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2018-11-23 |
Luke Kenneth... | add some arbitrary math into example |
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2018-11-23 |
Luke Kenneth... | call value_bits_sign direct |
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2018-11-23 |
Luke Kenneth... | can`t stand list incomprehension |
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2018-11-23 |
Luke Kenneth... | add example pipeline.py |
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2018-11-23 |
Luke Kenneth... | corrections, clash fetch_action and self.fetch_action |
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2018-11-23 |
Luke Kenneth... | add conversion code, see what happens |
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2018-11-22 |
Luke Kenneth... | more cleanup |
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2018-11-22 |
Luke Kenneth... | cleanup, use sync instead of comb where appropriate |
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2018-11-22 |
Luke Kenneth... | add cpudefs.py |
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2018-11-22 |
Luke Kenneth... | reorg case statement |
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2018-11-21 |
Luke Kenneth... | convert case statement |
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2018-11-21 |
Luke Kenneth... | converting cpu_fetch_stage to migen |
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2018-03-21 |
Jacob Lifshay | add licenses and readme |
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