projects / soc.git / shortlog
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
soc.git
2021-12-08 Tobias Platenmore work on test_loadstore1_ifetch_invalid() commit | commitdiff | tree
2021-12-08 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... commit | commitdiff | tree
2021-12-08 Tobias Platenadd skeleton for test_loadstore1_ifetch_invalid() commit | commitdiff | tree
2021-12-08 Luke Kenneth... check that no exception occurs in the virtual-memory... commit | commitdiff | tree
2021-12-08 Luke Kenneth... add OP_FETCH_FAILED to MMU Function Unit commit | commitdiff | tree
2021-12-08 Luke Kenneth... make LoadStore1 intsr_fault a "captured flag" - strictl... commit | commitdiff | tree
2021-12-08 Luke Kenneth... remove MSR and add CIA to MMU Input Record commit | commitdiff | tree
2021-12-08 Luke Kenneth... add instr_fault to LoadStore1 FSM commit | commitdiff | tree
2021-12-08 Luke Kenneth... add new PortInterfaceBase external_busy() option commit | commitdiff | tree
2021-12-08 Jacob Lifshayadd comment about draft instructions commit | commitdiff | tree
2021-12-08 Jacob Lifshayaccount for Mock absurdities commit | commitdiff | tree
2021-12-07 Luke Kenneth... complete the i-cache fetch through the MMU, including... commit | commitdiff | tree
2021-12-07 Luke Kenneth... set separate "iside" signal in LoadStore1 to not confuse it commit | commitdiff | tree
2021-12-07 Luke Kenneth... start extending icache loadstore test commit | commitdiff | tree
2021-12-07 Luke Kenneth... whoops another serious error in the CacheTagArray commit | commitdiff | tree
2021-12-07 Luke Kenneth... add first i-cache fetch (non-virtual), no MMU lookup... commit | commitdiff | tree
2021-12-07 Luke Kenneth... code-comments commit | commitdiff | tree
2021-12-07 Luke Kenneth... add in I-Cache into LoadStore1 - presently unused ... commit | commitdiff | tree
2021-12-07 Luke Kenneth... add discussion links and bugreport commit | commitdiff | tree
2021-12-07 Luke Kenneth... invert mmureq statements commit | commitdiff | tree
2021-12-07 Luke Kenneth... submodule tidyup commit | commitdiff | tree
2021-12-07 Jacob Lifshaymake bitmanip operations conditional on pspec.draft_bit... commit | commitdiff | tree
2021-12-07 Jacob Lifshayformat code commit | commitdiff | tree
2021-12-07 Jacob Lifshaymove rotator mode assignments as requested by lkcl commit | commitdiff | tree
2021-12-07 Jacob Lifshayformat code commit | commitdiff | tree
2021-12-07 Luke Kenneth... tidyup, comments commit | commitdiff | tree
2021-12-07 Luke Kenneth... debug print commit | commitdiff | tree
2021-12-06 Luke Kenneth... another major bug, CacheTagArray valid was only 1 bit... commit | commitdiff | tree
2021-12-06 Luke Kenneth... tidyup: move hit_set to DCachePendingHit in dcache.py commit | commitdiff | tree
2021-12-06 Luke Kenneth... dcache.py tidyup commit | commitdiff | tree
2021-12-06 Luke Kenneth... rename dtlb to dtlb_valid and tidyup commit | commitdiff | tree
2021-12-06 Luke Kenneth... convert TLBArray to TLBValidArray commit | commitdiff | tree
2021-12-06 Luke Kenneth... convert DTLBUpdate to use a pair of Memorys commit | commitdiff | tree
2021-12-06 Luke Kenneth... more signals local to DTLBUpdate commit | commitdiff | tree
2021-12-06 Luke Kenneth... more signals local to DTLBUpdate commit | commitdiff | tree
2021-12-06 Luke Kenneth... update DTLBUpdate to reflect internal API now commit | commitdiff | tree
2021-12-06 Luke Kenneth... ooo nasty bug. used tlb_hit.way instead of tlb_hit... commit | commitdiff | tree
2021-12-06 Luke Kenneth... move DTLB Tags/Valids/PTEs into DTLBUpdate module commit | commitdiff | tree
2021-12-06 Luke Kenneth... start moving TLBArray into DTLBUpdate commit | commitdiff | tree
2021-12-06 Luke Kenneth... PLRUs were selecting an output index, only one selected commit | commitdiff | tree
2021-12-06 Luke Kenneth... repeated copies of read/write addr/sel to Cache SRAMs commit | commitdiff | tree
2021-12-06 Luke Kenneth... move bank of PLRUs to their own submodule in both dcach... commit | commitdiff | tree
2021-12-06 Luke Kenneth... code-comments commit | commitdiff | tree
2021-12-06 Luke Kenneth... use binary-to-unary encoders in dcache.py commit | commitdiff | tree
2021-12-06 Luke Kenneth... global (one) do_read signal in cache_rams dcache.py commit | commitdiff | tree
2021-12-06 Luke Kenneth... use one-hot binary-to-unary in dcache.py commit | commitdiff | tree
2021-12-06 Luke Kenneth... use i_in.req to gate hit_way via Decoder in icache.py commit | commitdiff | tree
2021-12-06 Luke Kenneth... use Decoder (binary-to-unary) in icache.py to deal... commit | commitdiff | tree
2021-12-05 Luke Kenneth... use unary encoding (one-hot) for replace_way hit_way... commit | commitdiff | tree
2021-12-05 Luke Kenneth... code-comments commit | commitdiff | tree
2021-12-05 Luke Kenneth... whitespace and minor cleanup of D-Cache commit | commitdiff | tree
2021-12-05 Luke Kenneth... more use of TLBHit Record in D-Cache commit | commitdiff | tree
2021-12-05 Luke Kenneth... correct tlb_hit_way and index sizes, use TLBHit Record... commit | commitdiff | tree
2021-12-05 Luke Kenneth... use TLBRecord in D-Cache for which TLB is selected commit | commitdiff | tree
2021-12-05 Luke Kenneth... split out TLBRecord, correct number of valid bits commit | commitdiff | tree
2021-12-05 Luke Kenneth... use Record in DCache for TLB commit | commitdiff | tree
2021-12-05 Luke Kenneth... use Record in D-Cache Cache Tags commit | commitdiff | tree
2021-12-05 Luke Kenneth... whitespace commit | commitdiff | tree
2021-12-05 Luke Kenneth... use Record for I-Cache Cache Tag/Valid commit | commitdiff | tree
2021-12-05 Luke Kenneth... whitespace commit | commitdiff | tree
2021-12-05 Luke Kenneth... use Record for ICache TLB commit | commitdiff | tree
2021-12-05 Luke Kenneth... sorting out test_mmu_dcache.py to use wb_get commit | commitdiff | tree
2021-12-05 Luke Kenneth... convert icache.py to standard wishbone Interface commit | commitdiff | tree
2021-12-05 Luke Kenneth... fake up wishbone stall signal in icache. commit | commitdiff | tree
2021-12-05 Luke Kenneth... fix icache row store issue commit | commitdiff | tree
2021-12-05 Luke Kenneth... using same tag/row functions as in dcache.py commit | commitdiff | tree
2021-12-05 Luke Kenneth... more signal sizes in icache.py commit | commitdiff | tree
2021-12-05 Luke Kenneth... incorrect Signal sizes in icache.py, commit | commitdiff | tree
2021-12-05 Luke Kenneth... sorting out icache.py, used to work commit | commitdiff | tree
2021-12-05 Luke Kenneth... remove redundant code commit | commitdiff | tree
2021-12-05 Luke Kenneth... add I-Cache standard bus (not used yet) commit | commitdiff | tree
2021-12-05 Luke Kenneth... remove yet another duplicate copy of wb_get, possible... commit | commitdiff | tree
2021-12-05 Luke Kenneth... replace yet another duplicate copy of wb_get, possible... commit | commitdiff | tree
2021-12-05 Luke Kenneth... wishbone bus convert on dcache commit | commitdiff | tree
2021-12-05 Luke Kenneth... correct import of wg_get function commit | commitdiff | tree
2021-12-04 Luke Kenneth... remove yet another duplicated copy of wb_get and add... commit | commitdiff | tree
2021-12-04 Luke Kenneth... rename function which needs replacing commit | commitdiff | tree
2021-12-04 Luke Kenneth... should have been using common version of wb_get, not... commit | commitdiff | tree
2021-12-04 Luke Kenneth... should not have been duplicating wb_get function in... commit | commitdiff | tree
2021-12-04 Luke Kenneth... get test_mmu_dcache.py working again commit | commitdiff | tree
2021-12-04 Luke Kenneth... remove wb_get, should not have been duplicated commit | commitdiff | tree
2021-12-04 Luke Kenneth... remove wb_get, should not have been massively duplicate... commit | commitdiff | tree
2021-12-04 Luke Kenneth... fix return results from pi_ld commit | commitdiff | tree
2021-12-04 Luke Kenneth... wark-wark, broke mmu with removing rin. reverted commit | commitdiff | tree
2021-12-04 Tobias Platenfixed wait_addr to exit immediately on exception commit | commitdiff | tree
2021-12-04 Luke Kenneth... tidyup, comments commit | commitdiff | tree
2021-12-04 Luke Kenneth... tidyup mmu commit | commitdiff | tree
2021-12-04 Luke Kenneth... sigh in MMU FSM use direct access to ldst.dar/dsisr... commit | commitdiff | tree
2021-12-04 Luke Kenneth... remove DAR from PortInterface (where is the data going... commit | commitdiff | tree
2021-12-04 Luke Kenneth... stop using dar_o from PortInterface, get DAR directly... commit | commitdiff | tree
2021-12-04 Luke Kenneth... put DSISR and DAR publicly accessible in LoadStore1 commit | commitdiff | tree
2021-12-04 Luke Kenneth... whoops fix up exception happened if alignment triggers... commit | commitdiff | tree
2021-12-04 Luke Kenneth... fix pi_st which should not be trying to wait for the... commit | commitdiff | tree
2021-12-04 Luke Kenneth... fixing DAR updating from exceptions commit | commitdiff | tree
2021-12-04 Luke Kenneth... whoops commit | commitdiff | tree
2021-12-04 Luke Kenneth... MMU lookup DSISR load bit inverted in LoadStore1 commit | commitdiff | tree
2021-12-04 Luke Kenneth... store DAR in LoadStore1 commit | commitdiff | tree
2021-12-04 Luke Kenneth... not busy if excrption occurs on MMU_LOOKUP in loadstore.py commit | commitdiff | tree
2021-12-04 Luke Kenneth... add means to update dsisr from MMU FSM. TODO: add a... commit | commitdiff | tree
2021-12-03 Luke Kenneth... priv_mode/virt_mode are set in the request, which is... commit | commitdiff | tree
next