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soc.git
2021-12-04
Luke Kenneth...
whoops
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2021-12-04
Luke Kenneth...
MMU lookup DSISR load bit inverted in LoadStore1
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2021-12-04
Luke Kenneth...
store DAR in LoadStore1
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2021-12-04
Luke Kenneth...
not busy if excrption occurs on MMU_LOOKUP in loadstore.py
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2021-12-04
Luke Kenneth...
add means to update dsisr from MMU FSM. TODO: add a...
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2021-12-03
Luke Kenneth...
priv_mode/virt_mode are set in the request, which is...
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2021-12-03
Luke Kenneth...
in loadstore.py set align_intr from request which comes...
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2021-12-03
Luke Kenneth...
driver conflict on priv_mode and virt_mode, do not...
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2021-12-03
Luke Kenneth...
fix up test_loadstore1.py
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2021-12-03
Luke Kenneth...
in loadstore.py, when an exception is done or if the FSM
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2021-12-03
Luke Kenneth...
fix PortInterfaceBase
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2021-12-03
Luke Kenneth...
fix up LDST test functions pi_ld and pi_st to respect...
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2021-12-03
Luke Kenneth...
whitespace
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2021-12-03
Luke Kenneth...
add misaligned ld/st to trigger an exception
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2021-12-03
Luke Kenneth...
comment out dsisr and dar in mmu FSM for now
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2021-12-02
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2021-12-02
Tobias Platen
cleanup test_compldst_multi_mmu.py
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2021-12-02
Luke Kenneth...
add a bitvector remap function, the plan is to use...
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2021-12-02
Tobias Platen
fix test_random in test_loadstore1
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2021-12-02
Luke Kenneth...
use new namedtuple in core when calling regspec_decode()
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2021-12-02
Luke Kenneth...
add module parameter to regspec_decode and therefore...
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2021-12-02
Jacob Lifshay
remove bitmanip fu cuz ternlogi (the only instruction...
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2021-12-02
Jacob Lifshay
add ternlogi to shiftrot
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2021-12-02
Jacob Lifshay
format code
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2021-12-01
Luke Kenneth...
stack of changes to MultiCompUnit to speed it up
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2021-12-01
Luke Kenneth...
experimenting with option to shorten MultiCompUnit...
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2021-12-01
Luke Kenneth...
create single-stage ALU pipeline, shorten latency on...
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2021-12-01
Luke Kenneth...
allow MultiCompUnit to set read and write latches to...
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2021-12-01
Luke Kenneth...
FunctionUnitBaseMulti which derives from ReservationSta...
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2021-12-01
Luke Kenneth...
better name for read latch in core.py
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2021-12-01
Luke Kenneth...
use m.submodules[name] instead of getattr
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2021-12-01
Luke Kenneth...
remove redundant / mis-named variable in core
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2021-12-01
Luke Kenneth...
code-comments
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2021-12-01
Luke Kenneth...
remove unneeded data structure in core
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2021-12-01
Luke Kenneth...
whoops treereduce on write-vector set/clr error
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2021-12-01
Luke Kenneth...
more code-cleanup
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2021-12-01
Luke Kenneth...
use new regspec_decode and fu.get_iospec functions
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2021-12-01
Luke Kenneth...
core tidyup
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2021-12-01
Luke Kenneth...
add Regspecs get_io_spec function
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2021-11-30
Luke Kenneth...
start allocating more FUs (more ReservationStations)
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2021-11-30
Tobias Platen
random loadstore1 test: readback written data
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2021-11-30
Tobias Platen
reenable dcbz test case
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2021-11-30
Tobias Platen
return correct data from microwatt
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2021-11-30
Tobias Platen
cleanup test_loadstore1.py
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2021-11-30
Tobias Platen
loadstore: add done_delay
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2021-11-30
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2021-11-30
Luke Kenneth...
add LogicalTestCases back in to test_core.py (pass)
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2021-11-30
Luke Kenneth...
let PowerDecode2 decide which operand class to use...
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2021-11-30
Luke Kenneth...
use latched readflag (recspec_decode_read "ok") instead...
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2021-11-30
Luke Kenneth...
tidyup on read-flag latches
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2021-11-30
Luke Kenneth...
fix read-decode information by latching not just the...
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2021-11-30
Luke Kenneth...
fix write-after-write hazard checking
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2021-11-30
Luke Kenneth...
allow busy to settle before checking state in test_core.py
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2021-11-30
Luke Kenneth...
only check regs right at the end in test_core.py overla...
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2021-11-30
Luke Kenneth...
move sim call before core run in test_core.py
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2021-11-30
Luke Kenneth...
getting formerly unused test_core.py operational
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2021-11-29
Luke Kenneth...
whoops missed make_hazard_vec test
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2021-11-29
Luke Kenneth...
whoops do the set/get of the write-vector at a single...
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2021-11-29
Luke Kenneth...
always set fwd_bus_mode=False on regfiles
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2021-11-29
Luke Kenneth...
add MMU and SPR to list of FUs that must report "busy...
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2021-11-29
Luke Kenneth...
disallow overlap in core on LDST, Branch, and Trap.
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2021-11-29
Luke Kenneth...
use dict style not setattr on submodules
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2021-11-28
Tobias Platen
update loadstore1 testcase
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2021-11-27
Luke Kenneth...
code-comments
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2021-11-27
Luke Kenneth...
fix instructions of the type "read-reg-is-same-as-write"
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2021-11-27
Tobias Platen
loadstore testcase: read at random addresses
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2021-11-27
Luke Kenneth...
FU-Regs matrix tidyup and comments
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2021-11-27
Luke Kenneth...
minor tidyup on FU-Regs Matrix
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2021-11-27
Luke Kenneth...
update FURegDepMatrix to multi-dest
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2021-11-27
Luke Kenneth...
update naming on Reg_Rsv signals
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2021-11-27
Luke Kenneth...
add copyright and attribution notices
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2021-11-27
Luke Kenneth...
update FU_RW_Pending vectors to multi-dest
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2021-11-27
Luke Kenneth...
convert DependencyRow to multiple destination latches
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2021-11-27
Luke Kenneth...
add copyright and attribution notices to dependence_cell.py
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2021-11-27
Luke Kenneth...
update license and attribution in fu_reg_matrix.py
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2021-11-26
Luke Kenneth...
convert score6600_multi over to using RegSpecs (in...
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2021-11-26
Luke Kenneth...
early use of Array unnecessarily (all uses are static...
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2021-11-26
Luke Kenneth...
early use of Array unnecessarily (all uses are static...
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2021-11-25
Luke Kenneth...
get score6600_multi operational again
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2021-11-25
Luke Kenneth...
add debug prints in old simulator
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2021-11-25
Luke Kenneth...
add debug prints in old simulator
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2021-11-25
Tobias Platen
seperate invalid test case from other test cases
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2021-11-25
Tobias Platen
mmu: add debug output
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2021-11-25
Tobias Platen
add testcase for invalid pagetable
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2021-11-25
Tobias Platen
pimem: reset on exception
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2021-11-25
Tobias Platen
remove unuses dsisr signal
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2021-11-25
Tobias Platen
reset state to idle on exception
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2021-11-25
Luke Kenneth...
more sorting scoremulti
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2021-11-25
Luke Kenneth...
more sorting out scoremulti
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2021-11-25
Luke Kenneth...
add test pspec for scoremulti to work
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2021-11-24
Luke Kenneth...
convert hazard bitvectors to Reset-Priority SRLatch...
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2021-11-24
Tobias Platen
fix exception handling in pi_ld
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2021-11-24
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2021-11-24
Tobias Platen
improve debug output in mmu.py
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2021-11-24
Luke Kenneth...
fix write-after-write hazard detection
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2021-11-24
Luke Kenneth...
when allow_overlap enabled do a manual wait until all...
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2021-11-24
Luke Kenneth...
code-comments
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2021-11-24
Luke Kenneth...
add write-after-write hazard detection
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2021-11-24
Luke Kenneth...
add 2nd hazard bitvector port for write-after-write
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2021-11-24
Luke Kenneth...
whoops merged the two write-ports for RT and RA-with...
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