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soc.git
2020-10-12
Tobias Platen
update gitlab ci
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2020-10-12
Cole Poirier
add tested working fpga compile/build/load file for...
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2020-10-11
Luke Kenneth...
add way to bypass PLL for ECP5 and sim
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2020-10-11
Luke Kenneth...
comment out XICS/GPIO interrupt test, causes ECP5 litex...
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2020-10-11
Luke Kenneth...
record commands for building ECP5
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2020-10-11
Luke Kenneth...
litex sim.py operational
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2020-10-10
Cole Poirier
florent/versa_ecp5.py remove uneccessary imports, speci...
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2020-10-10
Luke Kenneth...
add debug start/stop to firmware_upload script
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2020-10-10
Luke Kenneth...
add DMI status / reset to firmware upload script
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2020-10-10
Luke Kenneth...
add first version of firmware uploader
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2020-10-09
Jacob Lifshay
update submodule
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2020-10-09
Jacob Lifshay
update submodule
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2020-10-09
Luke Kenneth...
use libresoc version of c4m-jtag repo
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2020-10-09
Luke Kenneth...
submodule update
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2020-10-09
Luke Kenneth...
drop in "undefined" function into ISAcaller namespace
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2020-10-09
Luke Kenneth...
rename undef to undefined (preserving the fact that...
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2020-10-09
Luke Kenneth...
missing yields in JTAG pads test to allow settling
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2020-10-09
Jacob Lifshay
finish converting mul tests to use common code
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2020-10-09
Jacob Lifshay
working on splitting out common mul pipe test code
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2020-10-09
Jacob Lifshay
add carry handling to pia_res_to_output
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2020-10-09
Jacob Lifshay
move pia_res_to_output to common test helpers
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2020-10-09
Jacob Lifshay
move mul pipe ilang test to separate file
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2020-10-09
Jacob Lifshay
add undef()
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2020-10-09
Jacob Lifshay
update submodule
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2020-10-08
Jacob Lifshay
update submodule
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2020-10-08
Luke Kenneth...
missing yields in JTAG pads test to allow settling
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2020-10-08
Luke Kenneth...
minor icache cleanup
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2020-10-08
Cole Poirier
second attempt at https://bugs.libre-soc.org/show_bug...
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2020-10-08
Cole Poirier
remove singleton dict per https://bugs.libre-soc.org...
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2020-10-08
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-10-08
Tobias Platen
add WIP test_pipe_caller.py for mmu
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2020-10-08
Luke Kenneth...
add incoming PortInterface to be connected to LoadStore...
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2020-10-08
Luke Kenneth...
JTAG boundary scan test 1st attempt
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2020-10-08
Luke Kenneth...
rework jtag test to use JTAG class not DMITAP
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2020-10-08
Luke Kenneth...
split out jtag util functions to separate module
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2020-10-08
Cole Poirier
first attempt at 3) of
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2020-10-08
Cole Poirier
modify wb_get per 1) of https://bugs.libre-soc.org...
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2020-10-07
Tobias Platen
connect mmu_done, ldst_error, cache_paradox
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2020-10-07
Luke Kenneth...
missing invert_in field from shiftrot input record
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2020-10-07
Luke Kenneth...
git submodule update
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2020-10-07
Luke Kenneth...
reorder / reorganise reset signals slightly
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2020-10-07
Jacob Lifshay
fix div tests
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2020-10-07
Jacob Lifshay
update submodule
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2020-10-07
Jacob Lifshay
Fix forgotten test_pipe_caller changes from e0b4334c7d8...
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2020-10-06
Tobias Platen
remove redunant signals
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2020-10-06
Luke Kenneth...
update comments on pimem.py
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2020-10-06
Tobias Platen
test_mmu_dcache_pi.py
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2020-10-06
Luke Kenneth...
comments
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2020-10-06
Luke Kenneth...
add ports function to DummyPLL
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2020-10-06
Luke Kenneth...
use pdecode2.do not pdecode2.e in test_pipe_caller...
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2020-10-06
Luke Kenneth...
skip Decode2ToOperand from PowerDecodeSubset
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2020-10-06
Luke Kenneth...
comment SRR1 mem.exception
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2020-10-06
Luke Kenneth...
add SRR1 setting for LDST memory exception trap
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2020-10-06
Luke Kenneth...
passing LDSTException over to Trap Pipeline
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2020-10-06
Luke Kenneth...
add LDSTException decode/handling in PowerDecoder2
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2020-10-06
Luke Kenneth...
make LDSTException fields added from list of fieldnames
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2020-10-06
Luke Kenneth...
move LDSTException to mem_types
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2020-10-06
Luke Kenneth...
submodule update
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2020-10-06
Luke Kenneth...
add LDSTException to PortInterface
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2020-10-06
Luke Kenneth...
add sdr bypass routing via JTAG boundary scan
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2020-10-06
Jacob Lifshay
add divde regression test
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2020-10-06
Jacob Lifshay
update submodule
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2020-10-06
Jacob Lifshay
add moduw regression test
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2020-10-06
Jacob Lifshay
update submodule
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2020-10-06
Jacob Lifshay
add workaround for nmigen bug #502
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2020-10-06
Jacob Lifshay
update submodule
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2020-10-06
Jacob Lifshay
add modsw regression
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2020-10-06
Jacob Lifshay
add test case for divweu regression
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2020-10-06
Jacob Lifshay
update submodule
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2020-10-06
Jacob Lifshay
print regs in hex
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2020-10-05
Luke Kenneth...
add debug / investigation print statements
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2020-10-05
Jacob Lifshay
`deepcopy` from cache instead of recreating parsers...
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2020-10-05
Jacob Lifshay
format code
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2020-10-05
Cole Poirier
icache.py fix ispow2() util fn per https://bugs.libre...
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2020-10-05
Luke Kenneth...
whoops fix syntax error
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2020-10-05
Luke Kenneth...
whoops fix syntax error
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2020-10-05
Luke Kenneth...
return test rather than "if test return True else False"
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2020-10-05
Luke Kenneth...
whitespace
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2020-10-05
Luke Kenneth...
whitespace
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2020-10-05
Cole Poirier
icache.py add python asserts that were a TODO commented...
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2020-10-05
Cole Poirier
icache.py fix formatting, mostly due to reduced indenta...
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2020-10-05
Cole Poirier
icache.py remove comment that contained the entirety...
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2020-10-05
Cole Poirier
icache.py move icache_miss WAIT_ACK FSM state into...
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2020-10-05
Cole Poirier
icache.py move icache_miss CLR_TAG FSM state into metho...
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2020-10-05
Cole Poirier
icache.py move icache_miss IDLE FSM state into method...
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2020-10-05
Jacob Lifshay
simplify create_args
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2020-10-05
Jacob Lifshay
Sort returned variables to make sure `overflow` is...
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2020-10-05
Jacob Lifshay
format caller.py
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2020-10-04
Jacob Lifshay
change div FSM pipeline unit to not have a combinatoria...
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2020-10-04
Luke Kenneth...
significant reorg of the litex pinspecs to use pinmux...
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2020-10-04
Luke Kenneth...
submodule update
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2020-10-04
Luke Kenneth...
remove ls180io import
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2020-10-04
Luke Kenneth...
move ls180io.py back into ls180.py
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2020-10-03
Luke Kenneth...
allow i2c to be routed via JTAG
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2020-10-03
Luke Kenneth...
nope. put it back and connect to platform pads in...
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2020-10-03
Luke Kenneth...
move iopad litex creation to ls180soc.py
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2020-10-03
Luke Kenneth...
minor reorg on JTAG, allow alternative pinset dict...
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2020-10-03
Jacob Lifshay
add regression testcase
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2020-10-03
Jacob Lifshay
update submodule
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2020-10-02
Cole Poirier
icache.py add req_hit_way as arg to icache_comb, actual...
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