2020-06-03 |
Luke Kenneth... | convert shift_rot tests to use common get_cu_inputs... |
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2020-06-03 |
Luke Kenneth... | reorganise ALU tests, move get_cu_inputs function to... |
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2020-06-03 |
Luke Kenneth... | worked out how to dynamically enable carry-in to ALU... |
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2020-06-03 |
Luke Kenneth... | correct overflow-enable flags for rdmask specs in ALU |
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2020-06-03 |
Luke Kenneth... | attempt to make carry-in and overflow-enable optional... |
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2020-06-03 |
Luke Kenneth... | remove rdflags in pipe_data.py (redundant) |
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2020-06-03 |
Luke Kenneth... | move over to using power_regspec_map.py from PowerDecod... |
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2020-06-03 |
Luke Kenneth... | move obtaining simulator data into common function... |
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2020-06-03 |
Luke Kenneth... | mention TODO on SPR regfile |
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2020-06-03 |
Cesar Strauss | Check completion of the sub-processes |
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2020-06-03 |
colepoirier | Fixed missing nia.ok.eq(1) in OP_RFID |
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2020-06-03 |
colepoirier | Fixed merge conflict by using remote changes |
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2020-06-03 |
Luke Kenneth... | tidyup branch. comments |
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2020-06-03 |
Luke Kenneth... | convenience variables |
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2020-06-03 |
Luke Kenneth... | FormX not FormXL |
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2020-06-03 |
Luke Kenneth... | add bit more TODO |
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2020-06-03 |
Luke Kenneth... | update submodule for ISA tables |
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2020-06-03 |
Luke Kenneth... | convenience rename for spr pipe_data.py, consistent... |
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2020-06-03 |
Cesar Strauss | Simplify immediate check |
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2020-06-03 |
Luke Kenneth... | add more TODOs |
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2020-06-03 |
Cesar Strauss | Preliminary check of the alu protocol |
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2020-06-03 |
Cesar Strauss | Pass along the operand, in the cycle in which go is... |
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2020-06-03 |
colepoirier | Fixed OP_RFID and OP_SC in fu/trap/main_stage |
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2020-06-03 |
Luke Kenneth... | add some more constants and ref to POWER9 pdf |
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2020-06-03 |
Luke Kenneth... | add an if for OP_MTMSR and some comments |
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2020-06-03 |
colepoirier | Attempted to fix OP_RFID in TRAP pipeline |
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2020-06-02 |
colepoirier | Implement TRAP instructions OP_RFID and OP_SC |
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2020-06-02 |
Luke Kenneth... | argh - bad hack, detecting when there are no registers... |
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2020-06-02 |
Luke Kenneth... | take out unneeded code, add Settle() to see if it helps... |
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2020-06-02 |
Luke Kenneth... | add lk field to DecodeOut2 |
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2020-06-02 |
Luke Kenneth... | move setting cia input to branch from get_cu_inputs... |
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2020-06-02 |
Luke Kenneth... | hooray, get_cu_inputs now common to both types of tests |
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2020-06-02 |
Luke Kenneth... | oooo very annoying. there does not appear to be any... |
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2020-06-02 |
Luke Kenneth... | add get_inputs function to branch test_pipe_caller |
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2020-06-02 |
Luke Kenneth... | remove unneeded variable |
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2020-06-02 |
Luke Kenneth... | Revert "ok ok - for OP_BCREG put CTR in spr2 as well" |
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2020-06-02 |
Luke Kenneth... | ok ok - for OP_BCREG put CTR in spr2 as well |
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2020-06-02 |
Michael Nolan | Select spr1 for bcctr - use fast_spr decoding from... |
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2020-06-02 |
Luke Kenneth... | set up CTR and LR only on BCREG when needed |
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2020-06-02 |
Luke Kenneth... | decode fast spr for OP_BCREG CTR, TAR and LR |
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2020-06-02 |
Luke Kenneth... | add TODO comments for read_fast1/2 |
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2020-06-02 |
Tobias Platen | proof_datamerger: proof that output is zero when idle |
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2020-06-02 |
Luke Kenneth... | argh overlapping commits on submodule (rebase did not... |
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2020-06-02 |
Luke Kenneth... | debugging branch fast registers |
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2020-06-02 |
Michael Nolan | Fix broken wiki version |
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2020-06-02 |
Michael Nolan | Handle removal of spr2 field from decoder |
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2020-06-02 |
Luke Kenneth... | add comment about fast1 and fast2 in branch test_pipe_c... |
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2020-06-02 |
Luke Kenneth... | add regspecmap function to PowerDecode2 |
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2020-06-02 |
Michael Nolan | Fix test_bc_reg |
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2020-06-02 |
Michael Nolan | Fix issues with test_bc_reg, wrong instruction field... |
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2020-06-02 |
Luke Kenneth... | move regspec function to separate module |
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2020-06-02 |
Luke Kenneth... | add in fast regs support in decoder and into regspec_decode |
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2020-06-02 |
Luke Kenneth... | add 2nd write-reg for LD/ST Update mode |
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2020-06-02 |
Luke Kenneth... | add write-regs encoding to regspec decoder |
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2020-06-02 |
Luke Kenneth... | add read-write register numbering detection |
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2020-06-02 |
Luke Kenneth... | whoops cut/paste error, creating write_ports not read_ports |
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2020-06-02 |
Luke Kenneth... | whoops syntax error |
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2020-06-02 |
Luke Kenneth... | add function expressing the relationship between regspe... |
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2020-06-02 |
Luke Kenneth... | whitespace |
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2020-06-02 |
Luke Kenneth... | rename regspecs to give a consistent naming scheme |
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2020-06-02 |
Luke Kenneth... | add MSR constants, TODO translated |
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2020-06-02 |
Luke Kenneth... | add TODO comments from microwatt source code |
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2020-06-02 |
Cesar Strauss | Allow at least one operand to be fetched |
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2020-06-02 |
Cesar Strauss | Hold rdmaskn active during the busy_o cycle |
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2020-06-01 |
Luke Kenneth... | remove reading port 3 for CR pipeline. RS moved to... |
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2020-06-01 |
Luke Kenneth... | okaaay add a "rdflags" function which obtains the yes... |
commit | commitdiff | tree |
2020-06-01 |
Luke Kenneth... | add test_bc_reg (fails) |
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2020-06-01 |
Luke Kenneth... | remove unneeded fields from Decode2Execute1Type |
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2020-06-01 |
Michael Nolan | Add proof for RegFile |
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2020-06-01 |
Luke Kenneth... | more unneeded fields from SR InputRecord |
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2020-06-01 |
Luke Kenneth... | remove data_len from SR input record |
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2020-06-01 |
Luke Kenneth... | remove zero/invert from ShiftRot Input Record |
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2020-06-01 |
Luke Kenneth... | add shift-rot input record and use it |
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2020-06-01 |
Luke Kenneth... | CompBROpSubset exists |
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2020-06-01 |
Luke Kenneth... | RS moved to port 1 (from port 3), remove need in ALU... |
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2020-06-01 |
Michael Nolan | Add proof for RegFileArray |
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2020-06-01 |
Luke Kenneth... | remove use of reg3 in logical pipeline: CSV files moved... |
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2020-06-01 |
Michael Nolan | Have regfile use AnySeq instead of AnyConst |
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2020-06-01 |
Luke Kenneth... | rotator carry is set into both XER CA and CA32 fields |
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2020-06-01 |
Luke Kenneth... | comment out rlwinm. for now |
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2020-06-01 |
Luke Kenneth... | argh - need to zero the src_i input after "Read" is... |
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2020-06-01 |
Michael Nolan | Enable k-induction for register file proof |
commit | commitdiff | tree |
2020-06-01 |
Michael Nolan | That was weird. For some reason it wasn't generating... |
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2020-06-01 |
Michael Nolan | Full BMC proof of Register |
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2020-06-01 |
Michael Nolan | Begin rewrite of proof_regfile.py |
commit | commitdiff | tree |
2020-06-01 |
Luke Kenneth... | put RB in 2nd position (matching immediate) in ShiftRot... |
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2020-06-01 |
Luke Kenneth... | sigh - another instance where write-mask needed to... |
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2020-06-01 |
Luke Kenneth... | remove xer so/ov, swap rs/rb to correct(?) order in... |
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2020-06-01 |
Tobias Platen | proof_datamerger wip |
commit | commitdiff | tree |
2020-06-01 |
Luke Kenneth... | add rlwinm. test instruction (sets CR0) |
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2020-06-01 |
Luke Kenneth... | remove duplicate signal |
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2020-06-01 |
Luke Kenneth... | allow ALU / Logical ops to select RS as 1st operand |
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2020-06-01 |
Luke Kenneth... | allow M*-Form shiftrot to swap RS/RB back to consistent... |
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2020-06-01 |
Luke Kenneth... | add first version of ShiftRot CompUnit test |
commit | commitdiff | tree |
2020-06-01 |
Luke Kenneth... | shiftrot uses LogicalOutputData not ALUOutputData |
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2020-06-01 |
Cesar Strauss | Add rdmaskn parameter and assert it along issue_i |
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2020-06-01 |
Luke Kenneth... | add assertions for branch compunit output |
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2020-06-01 |
Luke Kenneth... | invert SPR1/2 in branch output data |
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2020-06-01 |
Luke Kenneth... | decode SPRs for branch |
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2020-06-01 |
Luke Kenneth... | swap over SPR1/2 to fit with microwatt SPR conventions |
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next |