2021-05-01 |
Luke Kenneth... | use new AllFunctionUnits.get_fu function |
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2021-05-01 |
Luke Kenneth... | use SPRreduced to match PowerDecoder2 |
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2021-05-01 |
Luke Kenneth... | missing self. |
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2021-05-01 |
Luke Kenneth... | resolve DriverConflict in TstL0CacheBuffer, really... |
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2021-04-30 |
Luke Kenneth... | debug and stop on mmu test_pipe_caller.py |
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2021-04-30 |
Luke Kenneth... | comments on dcache-to-mmu link |
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2021-04-30 |
Luke Kenneth... | add a TestSRAM variant of LoadStore1, for being able... |
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2021-04-30 |
Luke Kenneth... | add basic test_issuer_mmu.py |
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2021-04-30 |
Luke Kenneth... | add option to use new mmu_cache_wb ConfigMemoryPortInte... |
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2021-04-30 |
Luke Kenneth... | hook up dcache wb_in/out to PortInterfaceBase Wishbone... |
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2021-04-30 |
Luke Kenneth... | sort out spblock 4k sram cell instance name to match... |
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2021-04-30 |
Luke Kenneth... | https://bugs.libre-soc.org/show_bug.cgi?id=635 |
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2021-04-30 |
Luke Kenneth... | better reporting on gpr comparisons |
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2021-04-30 |
Luke Kenneth... | set up LoadStore1 in ConfigMemoryPortInterface and... |
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2021-04-29 |
Luke Kenneth... | comment out adding mmu and dcache to pspec in MMU FSM |
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2021-04-29 |
Luke Kenneth... | move dcache into Loadstore1 |
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2021-04-27 |
Luke Kenneth... | add option to disable bus forwarding on SPRs and FAST... |
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2021-04-27 |
Luke Kenneth... | add option to enable/disable bus forwarding mode on... |
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2021-04-27 |
Luke Kenneth... | return read data out from Loadstore1 only when valid |
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2021-04-26 |
Luke Kenneth... | hook up MSR into MMU (TODO, use a lot less bits) |
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2021-04-26 |
Luke Kenneth... | simple regression dcache test was faulty. wishbone... |
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2021-04-26 |
Luke Kenneth... | comment read ack in sram |
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2021-04-26 |
Luke Kenneth... | incorrect indentation in dcache rams |
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2021-04-26 |
Luke Kenneth... | simplify dcache test |
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2021-04-25 |
Luke Kenneth... | spelling mistake |
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2021-04-25 |
Luke Kenneth... | remove RegStage1.real_adr temporary from dcache |
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2021-04-25 |
Luke Kenneth... | do not overwrite parameter ra in dcache |
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2021-04-25 |
Luke Kenneth... | comment out dcache_store from test, not the problem |
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2021-04-25 |
Luke Kenneth... | remove unneeded code |
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2021-04-25 |
Luke Kenneth... | read req in wb_in.stall, dcache |
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2021-04-25 |
Cesar Strauss | Shift-out skipped mask bits for both crpred and intpred |
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2021-04-25 |
Luke Kenneth... | add single regression test for dcache |
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2021-04-25 |
Luke Kenneth... | add TODO comment in dcache |
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2021-04-25 |
Luke Kenneth... | move Signals in dcache to relevant context |
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2021-04-25 |
Luke Kenneth... | dcache Elif used where If should have been |
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2021-04-25 |
Luke Kenneth... | whoops should be cyc & ~ack |
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2021-04-25 |
Luke Kenneth... | hard-code dcache stall signal to non-pipelined mode |
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2021-04-24 |
Luke Kenneth... | increase memory size in dcache test |
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2021-04-24 |
Luke Kenneth... | increase size of random dcache testing by 10 |
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2021-04-24 |
Luke Kenneth... | fix errors in dcache unit test |
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2021-04-24 |
Luke Kenneth... | whitespace |
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2021-04-24 |
Luke Kenneth... | add additional external libre-soc sphinx references... |
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2021-04-24 |
Luke Kenneth... | add additional external libre-soc sphinx references |
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2021-04-24 |
Luke Kenneth... | remove code moved to openpower-isa repo |
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2021-04-23 |
Luke Kenneth... | add comments on TestIssuer TestRunner |
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2021-04-23 |
Luke Kenneth... | comment tests back in |
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2021-04-23 |
Luke Kenneth... | fix import error |
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2021-04-23 |
Luke Kenneth... | error in setting fast regs test values |
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2021-04-23 |
Luke Kenneth... | import from openpower.tests |
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2021-04-23 |
Luke Kenneth... | whitespace |
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2021-04-23 |
Luke Kenneth... | move logical tests to openpower.test |
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2021-04-23 |
Luke Kenneth... | add trap test cases |
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2021-04-23 |
Luke Kenneth... | move SPR tests to openpower.test |
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2021-04-23 |
Luke Kenneth... | move branch test cases to openpower.test |
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2021-04-23 |
Luke Kenneth... | move LDST tests to openpower.test |
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2021-04-23 |
Luke Kenneth... | move mul tests to openpower.test |
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2021-04-23 |
Luke Kenneth... | move div tests to openpower.test |
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2021-04-23 |
Luke Kenneth... | move div tests to openpower.test |
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2021-04-23 |
Luke Kenneth... | move ALU test cases to openpower.test |
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2021-04-23 |
Luke Kenneth... | move MMU Testcase to openpower.test |
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2021-04-23 |
Luke Kenneth... | move CR test cases to openpower.test |
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2021-04-23 |
Luke Kenneth... | move shiftrot test cases to openpower.test |
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2021-04-23 |
Luke Kenneth... | import from openpower.endian |
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2021-04-23 |
Luke Kenneth... | use openpower.test.common |
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2021-04-23 |
Luke Kenneth... | remove openpower-isa submodule |
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2021-04-23 |
Luke Kenneth... | submodule update, can probably delete it though, now |
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2021-04-23 |
Luke Kenneth... | move more files to openpower-isa |
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2021-04-23 |
Luke Kenneth... | move to import from openpower-isa for reg enums |
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2021-04-23 |
Luke Kenneth... | svanalysis and pywriter now command-line scripts |
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2021-04-23 |
Luke Kenneth... | removed submodule |
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2021-04-23 |
Luke Kenneth... | remove pseudo, moved to openpower-isa |
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2021-04-23 |
Luke Kenneth... | remove simulator directory, moved to openpower-isa |
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2021-04-23 |
Luke Kenneth... | more openpower-isa conversion |
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2021-04-23 |
Luke Kenneth... | correct migration of openpower-isa |
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2021-04-23 |
Luke Kenneth... | more openpower import conversion |
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2021-04-23 |
Luke Kenneth... | more openpower import conversion |
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2021-04-23 |
Luke Kenneth... | move over to from openpower imports |
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2021-04-23 |
Luke Kenneth... | move over to openpower-isa repo |
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2021-04-23 |
Luke Kenneth... | move over to openpower-isa |
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2021-04-23 |
Luke Kenneth... | moving more over to openpower-isa repo |
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2021-04-23 |
Luke Kenneth... | removing more as moved over to openpower-isa |
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2021-04-23 |
Luke Kenneth... | submodule update |
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2021-04-22 |
Luke Kenneth... | add debugging and buffering to CacheRam |
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2021-04-22 |
Luke Kenneth... | whitespace |
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2021-04-22 |
Luke Kenneth... | r1.end_row_ix off-by-one in dcache |
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2021-04-22 |
Luke Kenneth... | sync missing in dcache |
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2021-04-22 |
Luke Kenneth... | dcache.py code-comments |
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2021-04-22 |
Luke Kenneth... | cleanup dcache |
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2021-04-22 |
Luke Kenneth... | error using sync, should have been comb |
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2021-04-22 |
Cesar Strauss | Implement CR predication |
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2021-04-21 |
Cesar Strauss | CR sub-fields are stored in MSB0 order |
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2021-04-21 |
Luke Kenneth... | experimenting with dcache |
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2021-04-21 |
Tobias Platen | testcase: pass PRTBL to mmu |
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2021-04-21 |
Cesar Strauss | Add CR predication test case for TestIssuer |
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2021-04-21 |
Cesar Strauss | Fix comment in CR predication test case |
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2021-04-21 |
Cesar Strauss | Fix sense of "invert" signal |
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2021-04-20 |
Luke Kenneth... | add enable MMU option to issuer_verilog.py |
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2021-04-20 |
Luke Kenneth... | cannot pass in arguments to Core - must be done with... |
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2021-04-20 |
Luke Kenneth... | use soc.bus.sram instead of nmigen_soc.wishbone.sram |
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2021-04-20 |
Luke Kenneth... | add wishbone sram.py (move from nmigen-soc) |
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next |