| 2020-10-08 | 
Cole Poirier | first attempt at 3) of | 
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| 2020-10-08 | 
Cole Poirier | modify wb_get per 1) of https://bugs.libre-soc.org...  | 
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| 2020-10-07 | 
Tobias Platen | connect mmu_done, ldst_error, cache_paradox | 
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| 2020-10-07 | 
Luke Kenneth...  | missing invert_in field from shiftrot input record | 
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| 2020-10-07 | 
Luke Kenneth...  | git submodule update | 
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| 2020-10-07 | 
Luke Kenneth...  | reorder / reorganise reset signals slightly | 
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| 2020-10-07 | 
Jacob Lifshay | fix div tests | 
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| 2020-10-07 | 
Jacob Lifshay | update submodule | 
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| 2020-10-07 | 
Jacob Lifshay | Fix forgotten test_pipe_caller changes from e0b4334c7d8...  | 
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| 2020-10-06 | 
Tobias Platen | remove redunant signals | 
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| 2020-10-06 | 
Luke Kenneth...  | update comments on pimem.py | 
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| 2020-10-06 | 
Tobias Platen | test_mmu_dcache_pi.py | 
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| 2020-10-06 | 
Luke Kenneth...  | comments | 
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| 2020-10-06 | 
Luke Kenneth...  | add ports function to DummyPLL | 
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| 2020-10-06 | 
Luke Kenneth...  | use pdecode2.do not pdecode2.e in test_pipe_caller...  | 
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| 2020-10-06 | 
Luke Kenneth...  | skip Decode2ToOperand from PowerDecodeSubset | 
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| 2020-10-06 | 
Luke Kenneth...  | comment SRR1 mem.exception | 
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| 2020-10-06 | 
Luke Kenneth...  | add SRR1 setting for LDST memory exception trap | 
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| 2020-10-06 | 
Luke Kenneth...  | passing LDSTException over to Trap Pipeline | 
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| 2020-10-06 | 
Luke Kenneth...  | add LDSTException decode/handling in PowerDecoder2 | 
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| 2020-10-06 | 
Luke Kenneth...  | make LDSTException fields added from list of fieldnames | 
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| 2020-10-06 | 
Luke Kenneth...  | move LDSTException to mem_types | 
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| 2020-10-06 | 
Luke Kenneth...  | submodule update | 
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| 2020-10-06 | 
Luke Kenneth...  | add LDSTException to PortInterface | 
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| 2020-10-06 | 
Luke Kenneth...  | add sdr bypass routing via JTAG boundary scan | 
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| 2020-10-06 | 
Jacob Lifshay | add divde regression test | 
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| 2020-10-06 | 
Jacob Lifshay | update submodule | 
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| 2020-10-06 | 
Jacob Lifshay | add moduw regression test | 
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| 2020-10-06 | 
Jacob Lifshay | update submodule | 
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| 2020-10-06 | 
Jacob Lifshay | add workaround for nmigen bug #502 | 
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| 2020-10-06 | 
Jacob Lifshay | update submodule | 
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| 2020-10-06 | 
Jacob Lifshay | add modsw regression | 
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| 2020-10-06 | 
Jacob Lifshay | add test case for divweu regression | 
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| 2020-10-06 | 
Jacob Lifshay | update submodule | 
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| 2020-10-06 | 
Jacob Lifshay | print regs in hex | 
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| 2020-10-05 | 
Luke Kenneth...  | add debug / investigation print statements | 
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| 2020-10-05 | 
Jacob Lifshay | `deepcopy` from cache instead of recreating parsers...  | 
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| 2020-10-05 | 
Jacob Lifshay | format code | 
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| 2020-10-05 | 
Cole Poirier | icache.py fix ispow2() util fn per https://bugs.libre...  | 
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| 2020-10-05 | 
Luke Kenneth...  | whoops fix syntax error | 
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| 2020-10-05 | 
Luke Kenneth...  | whoops fix syntax error | 
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| 2020-10-05 | 
Luke Kenneth...  | return test rather than "if test return True else False" | 
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| 2020-10-05 | 
Luke Kenneth...  | whitespace | 
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| 2020-10-05 | 
Luke Kenneth...  | whitespace | 
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| 2020-10-05 | 
Cole Poirier | icache.py add python asserts that were a TODO commented...  | 
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| 2020-10-05 | 
Cole Poirier | icache.py fix formatting, mostly due to reduced indenta...  | 
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| 2020-10-05 | 
Cole Poirier | icache.py remove comment that contained the entirety...  | 
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| 2020-10-05 | 
Cole Poirier | icache.py move icache_miss WAIT_ACK FSM state into...  | 
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| 2020-10-05 | 
Cole Poirier | icache.py move icache_miss CLR_TAG FSM state into metho...  | 
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| 2020-10-05 | 
Cole Poirier | icache.py move icache_miss IDLE FSM state into method...  | 
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| 2020-10-05 | 
Jacob Lifshay | simplify create_args | 
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| 2020-10-05 | 
Jacob Lifshay | Sort returned variables to make sure `overflow` is...  | 
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| 2020-10-05 | 
Jacob Lifshay | format caller.py | 
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| 2020-10-04 | 
Jacob Lifshay | change div FSM pipeline unit to not have a combinatoria...  | 
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| 2020-10-04 | 
Luke Kenneth...  | significant reorg of the litex pinspecs to use pinmux...  | 
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| 2020-10-04 | 
Luke Kenneth...  | submodule update | 
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| 2020-10-04 | 
Luke Kenneth...  | remove ls180io import | 
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| 2020-10-04 | 
Luke Kenneth...  | move ls180io.py back into ls180.py | 
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| 2020-10-03 | 
Luke Kenneth...  | allow i2c to be routed via JTAG | 
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| 2020-10-03 | 
Luke Kenneth...  | nope.  put it back and connect to platform pads in...  | 
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| 2020-10-03 | 
Luke Kenneth...  | move iopad litex creation to ls180soc.py | 
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| 2020-10-03 | 
Luke Kenneth...  | minor reorg on JTAG, allow alternative pinset dict...  | 
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| 2020-10-03 | 
Jacob Lifshay | add regression testcase | 
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| 2020-10-03 | 
Jacob Lifshay | update submodule | 
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| 2020-10-02 | 
Cole Poirier | icache.py add req_hit_way as arg to icache_comb, actual...  | 
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| 2020-10-02 | 
Luke Kenneth...  | add pinmux generator to create litex pinmap | 
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| 2020-10-02 | 
Luke Kenneth...  | add pinmux as submodule | 
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| 2020-10-01 | 
Cole Poirier | icache.py add missing comb signal assignments per https...  | 
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| 2020-10-01 | 
Luke Kenneth...  | arg CacheRam read output needs delay by 1 cycle | 
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| 2020-10-01 | 
Luke Kenneth...  | do not pass cache row array around, just the current row | 
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| 2020-10-01 | 
Luke Kenneth...  | revert bug in icache wishbone ack | 
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| 2020-10-01 | 
Luke Kenneth...  | add clksel, pll to ls180 | 
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| 2020-10-01 | 
Luke Kenneth...  | create dummy PLL block, connect up to core and clock...  | 
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| 2020-10-01 | 
Cesar Strauss | Add GTKWave document to test_compunit_fsm | 
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| 2020-09-30 | 
Luke Kenneth...  | add I2C into ls180 | 
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| 2020-09-30 | 
Luke Kenneth...  | add ASIC version of I2C Master | 
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| 2020-09-30 | 
Luke Kenneth...  | clean up row store and wb adr in icache | 
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| 2020-09-30 | 
Luke Kenneth...  | hmm only set wishbone address if ack is actually received | 
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| 2020-09-30 | 
Luke Kenneth...  | add more debug prints in icache | 
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| 2020-09-30 | 
Luke Kenneth...  | remove more reviewed comments | 
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| 2020-09-30 | 
Luke Kenneth...  | remove reviewed comments | 
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| 2020-09-30 | 
Luke Kenneth...  | comb on wr_index not sync | 
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| 2020-09-30 | 
Luke Kenneth...  | start removing reviewed comments | 
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| 2020-09-30 | 
Luke Kenneth...  | use same constant name (confusing otherwise) | 
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| 2020-09-30 | 
Luke Kenneth...  | need asserts | 
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| 2020-09-30 | 
Luke Kenneth...  | halve the number of icache lines for now | 
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| 2020-09-30 | 
Luke Kenneth...  | use Repl rather than for-loop to copy bit | 
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| 2020-09-30 | 
Luke Kenneth...  | move loop invariant test out of loop | 
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| 2020-09-30 | 
Luke Kenneth...  | reduce size of ilang file by a factor of FIVE | 
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| 2020-09-30 | 
Luke Kenneth...  | store tag in temp signal | 
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| 2020-09-30 | 
Luke Kenneth...  | reduce gate usage by getting cache row only not entire...  | 
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| 2020-09-30 | 
Luke Kenneth...  | fix read_tag to use word_select correctly | 
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| 2020-09-30 | 
Luke Kenneth...  | forgot to add PLRUs as submodules | 
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| 2020-09-29 | 
Cole Poirier | icache.py fix combinatorial loop with by testing temp...  | 
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| 2020-09-29 | 
Cole Poirier | icache.py fix is_last_row_addr, get_next_row_addr | 
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| 2020-09-29 | 
Cole Poirier | icache.py trying to sort out test failure, added r...  | 
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| 2020-09-29 | 
Cole Poirier | icache.py fix test stbs_done signal, not stbs_zero...  | 
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| 2020-09-29 | 
Cole Poirier | icache.py fix rarange | 
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| 2020-09-29 | 
Cole Poirier | icache.py fixed numerous bugs as specified by lkcl...  | 
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| 2020-09-28 | 
Cole Poirier | icache.py use d_out as input to assignment instead...  | 
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