1 -- A JTAG complient tap controller implementation
2 -- This is implemented based on the IEEE 1149.1 standard
5 use ieee.std_logic_1164.ALL;
9 entity c4m_jtag_tap_controller is
11 DEBUG: boolean := false;
13 IR_WIDTH: integer := 2;
16 MANUFACTURER: std_logic_vector(10 downto 0) := "10001111111";
17 PART_NUMBER: std_logic_vector(15 downto 0) := "0000000000000001";
18 VERSION: std_logic_vector(3 downto 0) := "0000"
28 -- The FSM state indicators
30 DRCAPTURE: out std_logic;
31 DRSHIFT: out std_logic;
32 DRUPDATE: out std_logic;
34 -- The Instruction Register
35 IR: out std_logic_vector(IR_WIDTH-1 downto 0);
37 -- The I/O access ports
38 CORE_IN: out std_logic_vector(IOS-1 downto 0);
39 CORE_EN: in std_logic_vector(IOS-1 downto 0);
40 CORE_OUT: in std_logic_vector(IOS-1 downto 0);
42 -- The pad connections
43 PAD_IN: in std_logic_vector(IOS-1 downto 0);
44 PAD_EN: out std_logic_vector(IOS-1 downto 0);
45 PAD_OUT: out std_logic_vector(IOS-1 downto 0)
47 end c4m_jtag_tap_controller;
49 architecture rtl of c4m_jtag_tap_controller is
50 signal S_STATE: TAPSTATE_TYPE;
51 signal S_NEXT_STATE: TAPSTATE_TYPE;
52 signal S_IRSTATE: std_logic;
53 signal S_DRSTATE: std_logic;
54 signal S_IR: std_logic_vector(IR_WIDTH-1 downto 0);
56 signal IR_TDO: std_logic;
57 signal IR_TDO_EN: std_logic;
58 signal ID_TDO: std_logic;
59 signal ID_TDO_EN: std_logic;
60 signal IO_TDO: std_logic;
61 signal IO_TDO_EN: std_logic;
65 RESET <= '1' when S_STATE = TestLogicReset else '0';
66 DRCAPTURE <= '1' when S_STATE = Capture and S_DRSTATE = '1' else '0';
67 DRSHIFT <= '1' when S_STATE = Shift and S_DRSTATE = '1' else '0';
68 DRUPDATE <= '1' when S_STATE = Update and S_DRSTATE = '1' else '0';
77 NEXT_STATE => S_NEXT_STATE,
82 -- The instruction register
83 IRBLOCK: c4m_jtag_irblock
93 NEXT_STATE => S_NEXT_STATE,
99 IDBLOCK: c4m_jtag_idblock
101 IR_WIDTH => IR_WIDTH,
102 PART_NUMBER => PART_NUMBER,
103 MANUFACTURER => MANUFACTURER
111 NEXT_STATE => S_NEXT_STATE,
112 DRSTATE => S_DRSTATE,
117 IOBLOCK: c4m_jtag_ioblock
119 IR_WIDTH => IR_WIDTH,
128 NEXT_STATE => S_NEXT_STATE,
129 DRSTATE => S_DRSTATE,
131 CORE_OUT => CORE_OUT,
139 TDO <= IR_TDO when IR_TDO_EN = '1' else
140 ID_TDO when ID_TDO_EN = '1' else
141 IO_TDO when IO_TDO_EN = '1' else
144 CHECK_EN: if DEBUG generate
145 signal EN: std_logic_vector(2 downto 0) := "000";
147 EN <= IR_TDO_EN & ID_TDO_EN & IO_TDO_EN;
148 assert EN = "000" or EN = "100" or EN = "010" or EN = "001"
149 report "TDO conflict in c4m_jtag_tap_controller"
151 end generate CHECK_EN;