split out pack to separate module

[ieee754fpu.git] / src / add / nmigen_add_experiment.py

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index 9eb5a4bd985bbfb016e36081fa16af5bf3538cb4..22e9e991144d9f953a48718bf7b532c79c6c8286 100644 (file)
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -22,6 +22,7 @@ from fpcommon.postnormalise import (FPNorm1Data, FPNorm1ModSingle,
                             FPNorm1ModMulti, FPNorm1Single, FPNorm1Multi)
 from fpcommon.roundz import (FPRoundData, FPRoundMod, FPRound)
 from fpcommon.corrections import (FPCorrectionsMod, FPCorrections)
+from fpcommon.pack import (FPPackData, FPPackMod, FPPack)
 
 
 class FPAddSpecialCasesMod:
@@ -673,83 +674,6 @@ class FPNormToPack(FPState, UnbufferedPipeline):
         m.next = "pack_put_z"
 
 
-class FPPackData:
-
-    def __init__(self, width, id_wid):
-        self.z = Signal(width, reset_less=True)
-        self.mid = Signal(id_wid, reset_less=True)
-
-    def eq(self, i):
-        return [self.z.eq(i.z), self.mid.eq(i.mid)]
-
-    def ports(self):
-        return [self.z, self.mid]
-
-
-class FPPackMod:
-
-    def __init__(self, width, id_wid):
-        self.width = width
-        self.id_wid = id_wid
-        self.i = self.ispec()
-        self.o = self.ospec()
-
-    def ispec(self):
-        return FPRoundData(self.width, self.id_wid)
-
-    def ospec(self):
-        return FPPackData(self.width, self.id_wid)
-
-    def process(self, i):
-        return self.o
-
-    def setup(self, m, in_z):
-        """ links module to inputs and outputs
-        """
-        m.submodules.pack = self
-        m.d.comb += self.i.eq(in_z)
-
-    def elaborate(self, platform):
-        m = Module()
-        z = FPNumOut(self.width, False)
-        m.submodules.pack_in_z = self.i.z
-        m.submodules.pack_out_z = z
-        m.d.comb += self.o.mid.eq(self.i.mid)
-        with m.If(~self.i.out_do_z):
-            with m.If(self.i.z.is_overflowed):
-                m.d.comb += z.inf(self.i.z.s)
-            with m.Else():
-                m.d.comb += z.create(self.i.z.s, self.i.z.e, self.i.z.m)
-        with m.Else():
-            m.d.comb += z.v.eq(self.i.oz)
-        m.d.comb += self.o.z.eq(z.v)
-        return m
-
-
-class FPPack(FPState):
-
-    def __init__(self, width, id_wid):
-        FPState.__init__(self, "pack")
-        self.mod = FPPackMod(width)
-        self.out_z = self.ospec()
-
-    def ispec(self):
-        return self.mod.ispec()
-
-    def ospec(self):
-        return self.mod.ospec()
-
-    def setup(self, m, in_z):
-        """ links module to inputs and outputs
-        """
-        self.mod.setup(m, in_z)
-
-        m.d.sync += self.out_z.v.eq(self.mod.out_z.v)
-        m.d.sync += self.out_z.mid.eq(self.mod.o.mid)
-
-    def action(self, m):
-        m.next = "pack_put_z"
-
 
 class FPPutZ(FPState):