move FPID to fpbase

[ieee754fpu.git] / src / add / nmigen_add_experiment.py

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index 112e7cf291636297f5c2d3bbf354b143949a4462..a86828db4cd3e100efaff8a05e22d8f5e77d0b49 100644 (file)
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -14,7 +14,7 @@ from singlepipe import (ControlBase, StageChain, UnbufferedPipeline,
 from multipipe import CombMuxOutPipe
 from multipipe import PriorityCombMuxInPipe
 
-from fpbase import FPState
+from fpbase import FPState, FPID
 from fpcommon.getop import (FPGetOpMod, FPGetOp, FPNumBase2Ops, FPADDBaseData,                              FPGet2OpMod, FPGet2Op)
 from fpcommon.denorm import (FPSCData, FPAddDeNormMod, FPAddDeNorm)
 from fpcommon.postcalc import FPAddStage1Data
@@ -142,21 +142,6 @@ class FPAddSpecialCasesMod:
         return m
 
 
-class FPID:
-    def __init__(self, id_wid):
-        self.id_wid = id_wid
-        if self.id_wid:
-            self.in_mid = Signal(id_wid, reset_less=True)
-            self.out_mid = Signal(id_wid, reset_less=True)
-        else:
-            self.in_mid = None
-            self.out_mid = None
-
-    def idsync(self, m):
-        if self.id_wid is not None:
-            m.d.sync += self.out_mid.eq(self.in_mid)
-
-
 class FPAddSpecialCases(FPState):
     """ special cases: NaNs, infs, zeros, denormalised
         NOTE: some of these are unique to add.  see "Special Operations"