found an error in PartitionedAssign and PartitionedRepl

[ieee754fpu.git] / src / ieee754 / part_repl / repl.py

diff --git a/src/ieee754/part_repl/repl.py b/src/ieee754/part_repl/repl.py
index 7347648370dc346a1e80ad642be82bdb3b19a401..05db372a5203dba1f4c5fe46af8d75ed802a2286 100644 (file)
--- a/src/ieee754/part_repl/repl.py
+++ b/src/ieee754/part_repl/repl.py
@@ -73,7 +73,8 @@ class PartitionedRepl(Elaboratable):
         start = keys[upto]
         end = keys[upto+numparts]
         print ("start end", start, end, len(x))
-        return x[start:end]
+        # access the underlying Signal of SimdSignal directly
+        return x.sig[start:end]
 
     def elaborate(self, platform):
         m = Module()