7 | PO | BO| BI | BD |AA|LK |
10 |0 |6 |10 |15 |22 |23 |31|
11 | PO | RS | me | sh | me | XO |Rc|
14 |0 |6 |11 |16 |21 |26 |27 31|
15 | PO | RT | RA | RB |bm |L | XO |
18 |0 |6 |9 |12 |15 |18 |21 |29 |31 |
19 | PO | BF | BFA| BFB| BFC| msk| TLI | XO |msk|
22 |0 |6 |11 |16 |20 |27 |30 |31 |
23 | PO | ///| ///| // | LEV | //| 1| / |
26 |0 |6 |9 |10 |11 |16 |31 |
31 | PO | BF | / | L | RA| SI |
32 | PO | BF | / | L | RA| UI |
38 |0 |6 |11 |16 |30 |31 |
39 | PO | RT | RA | DS | XO |
40 | PO | RS | RA | DS | XO |
41 | PO | RSp | RA | DS | XO |
42 | PO | FRTp | RA | DS | XO |
43 | PO | FRSp | RA | DS | XO |
46 |0 |6 |11 |16 |28|29 |31 |
47 | PO | RTp | RA | DQ | PT |
48 | PO | S | RA | DQ |SX| XO |
49 | PO | T | RA | DQ |TX| XO |
53 | PO | RT| d1| d0| XO|d2
54 | PO | FRS| d1| d0| XO|d2
58 |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 |
59 | PO | RT | RA | /// | XO | / |
60 | PO | RT | RA | RB | XO | / |
61 | PO | RT | RA | RB | XO |EH |
62 | PO | RT | RA | NB | XO | / |
63 | PO | RT | /|SR | /// | XO | / |
64 | PO | RT | /// | RB | XO | / |
65 | PO | RT | /// | RB | XO | 1 |
66 | PO | RT | /// | /// | XO | / |
67 | PO | RS | RA | RB | XO |Rc |
68 | PO | RT | RA | RB | XO |Rc |
69 | PO | RS | RA | RB | XO | 1 |
70 | PO | RS | RA | RB | XO | / |
71 | PO | RS | RA | NB | XO | / |
72 | PO | RS | RA | SH | XO |Rc |
73 | PO | RS | RA | /// | XO |Rc |
74 | PO | RS | RA | /// | XO | / |
75 | PO | RS | /|SR | /// | XO | / |
76 | PO | RS | /// | RB | XO | / |
77 | PO | RS | /// | /// | XO | / |
78 | PO | RS | /// |L1| /// | XO | / |
79 | PO | TH | RA | RB | XO | / |
80 | PO | BF |/ | L | RA | RB | XO | / |
81 | PO | BF |// | FRA | FRB | XO | / |
82 | PO | BF |// | BFA | // | /// | XO | / |
83 | PO | BF |// | /// |W | U |/ | XO |Rc |
84 | PO | BF |// | /// | /// | XO | / |
85 | PO | TH | RA | RB | XO | / |
86 | PO | /| CT | /// | /// | XO | / |
87 | PO | /| CT | RA | RB | XO | / |
88 | PO | /// | L2 | RA | RB | XO | / |
89 | PO | /// | L2 | /// | RB | XO | / |
90 | PO | /// | L2 | /// | /// | XO | / |
91 | PO | /// | L2 | /| E | /// | XO | / |
92 | PO | TO | RA | RB | XO | / |
93 | PO | FRT | RA | RB | XO | / |
94 | PO | FRT | FRA | FRB | XO | / |
95 | PO | FRTp | RA | RB | XO | / |
96 | PO | FRT | /// | FRB | XO |Rc |
97 | PO | FRT | /// | FRBp | XO |Rc |
98 | PO | FRT | /// | /// | XO |Rc |
99 | PO | FRTp | /// | FRB | XO |Rc |
100 | PO | FRTp | /// | FRBp | XO |Rc |
101 | PO | FRTp | FRA | FRBp | XO |Rc |
102 | PO | FRTp | FRAp | FRBp | XO |Rc |
103 | PO | BF |// | FRA | FRBp | XO | / |
104 | PO | BF |// | FRAp | FRBp | XO | / |
105 | PO | FRT |S | | FRB | XO |Rc |
106 | PO | FRTp |S | | FRBp | XO |Rc |
107 | PO | FRS | RA | RB | XO | / |
108 | PO | FRSp | RA | RB | XO | / |
109 | PO | BT | /// | /// | XO |Rc |
110 | PO | /// | RA | RB | XO | / |
111 | PO | /// | /// | RB | XO | / |
112 | PO | /// | /// | /// | XO | / |
113 | PO | /// | /// | E|/// | XO | / |
114 | PO | //|IH | /// | /// | XO | / |
115 | PO | A|// | /// | /// | XO | 1 |
116 | PO | A|// |R | /// | /// | XO | 1 |
117 | PO | /// | RA | RB | XO | 1 |
118 | PO | /// |WC | /// | /// | XO | / |
119 | PO | /// |T | RA | RB | XO | / |
120 | PO | VRT | RA | RB | XO | / |
121 | PO | VRS | RA | RB | XO | / |
122 | PO | MO | /// | /// | XO | / |
123 | PO | RT | /// |L3 | /// | XO | / |
124 | PO | FRT | FRA | FRB | XO | Rc |
125 | PO | FRT | FRA | RB | XO | Rc |
128 |0 |6 |9 |11 |14 |16 |19|20|21 |31 |
129 | PO | BT | BA | BB | XO | / |
130 | PO | BO | BI | /// |BH | XO |LK |
131 | PO | | /// |S | XO | / |
132 | PO | BF |// |BFA |// | /// | XO | / |
133 | PO | /// | XO | / |
137 |0 |6 |11|12 |20|21 |31 |
138 | PO | RT | spr | XO | / |
139 | PO | RT | tbr | XO | / |
140 | PO | RT |0 | /// | XO | / |
141 | PO | RT |1 | FXM |/ | XO | / |
142 | PO | RT | dcr | XO | / |
143 | PO | RT | pmrn | XO | / |
144 | PO | RT | BHRBE | XO | / |
145 | PO | DUI | DUIS | XO | / |
146 | PO | RS |0 | FXM |/ | XO | / |
147 | PO | RS |1 | FXM |/ | XO | / |
148 | PO | RS | spr | XO | / |
149 | PO | RS | dcr | XO | / |
150 | PO | RS | pmrn | XO | / |
153 |0 |6|7 |15|16 |21 |31 |
154 | PO |L| FLM |W |FRB | XO |Rc |
157 |0 |6 |11 |16 |21 |31 |
158 | PO | T | RA | RB | XO |TX |
159 | PO | S | RA | RB | XO |SX |
162 |0 |6 |9 |11 |14 |16 |21 |30|31 |
163 | PO | T | /// | B |XO |BX|TX |
164 | PO | T | /// |UIM | B |XO |BX|TX |
165 | PO | BF | //| /// | B |XO |BX| / |
168 |0 |6 |9 |11 |16 |21 |22 |24 |29|30|31 |
169 | PO | T | A | B | XO |AX|BX|TX |
170 | PO | T | A | B |Rc | XO |AX|BX|TX |
171 | PO | BF | // | A | B | XO |AX|BX|/ |
172 | PO | T | A | B |XO |SHW | XO |AX|BX|TX |
173 | PO | T | A | B |XO |DM | XO |AX|BX|TX |
176 |0 |6 |11 |16 |21 |26 |28|29 |30|31 |
177 | PO | T | A | B | C | XO |CX|AX |BX|TX |
180 |0 |6 |11 |16 |21 |30|31 |
181 | PO | RS | RA | sh | XO |sh|Rc |
184 |0 |6 |11 |16 |22 |31 |
185 | PO | RT | RA | XBI | XO |Rc |
188 |0 |6 |11 |16 |21 |22 |31 |
189 | PO | RT| RA| RB |OE | XO |Rc |
190 | PO | RT| RA| RB | /| XO |Rc |
191 | PO | RT| RA| RB | /| XO | / |
192 | PO | RT| RA| /// |OE | XO |Rc |
195 |0 |6 |11 |16 |21 |26 |31 |
196 | PO | FRT | FRA | FRB | FRC | XO |Rc |
197 | PO | FRT | FRA | FRB | /// | XO |Rc |
198 | PO | FRT | FRA | /// | FRC | XO |Rc |
199 | PO | FRT | /// | FRB | /// | XO |Rc |
200 | PO | RT | RA | RB | BC | XO | /|
203 |0 |6 |11 |16 |21 |26 |31|
204 | PO | RS | RA | RB | MB | ME |Rc|
205 | PO | RS | RA | SH | MB | ME |Rc|
208 |0 |6 |11 |16 |21 |27|30|31|
209 | PO | RS | RA | sh | mb |XO|sh|Rc|
210 | PO | RS | RA | sh | me |XO|sh|Rc|
213 |0 |6 |11 |16 |21 |27 |31|
214 | PO | RS | RA | RB | mb | XO |Rc|
215 | PO | RS | RA | RB | me | XO |Rc|
218 |0 |6 |11 |16 |21|22 |25|26 |31|
219 | PO | RT | RA | RB | RC | XO |
220 | PO | VRT | VRA | VRB | VRC | XO |
221 | PO | VRT | VRA | VRB | /|SHB | XO |
222 | PO | VRT | VRA | VRB | /|BFA|/ | XO |
225 |0 |6 |11 |16 |21 |24|26 |31|
226 | PO | RT | RA | RB | RC | XO |Rc|
229 |0 |6 |11 |16 |21|22 |31|
230 | PO | VRT | VRA | VRB |Rc| XO |
233 |0 |6 |11 |16 |21 |31|
234 | PO | VRT | VRA | VRB | XO |
235 | PO | VRT | /// | VRB | XO |
236 | PO | VRT | UIM | VRB | XO |
237 | PO | VRT | / UIM | VRB | XO |
238 | PO | VRT | // UIM | VRB | XO |
239 | PO | VRT | /// UIM | VRB | XO |
240 | PO | VRT | SIM | ///| XO |
241 | PO | VRT | ///| | XO |
242 | PO | |/// | VRB | XO |
245 |0 |6 |9 |11 |16 |21 |31|
246 | PO | RS | RA | RB | XO |
247 | PO | RS | RA | UI | XO |
248 | PO | RT | ///| RB | XO |
249 | PO | RT | RA | RB | XO |
250 | PO | RT | RA | ///| XO |
251 | PO | RT | UI | RB | XO |
252 | PO | BF|//| RA | RB | XO |
253 | PO | RT | RA | UI | XO |
254 | PO | RT | SI | ///| XO |
257 |0 |6 |11 |16 |21 |29 |31 |
258 | PO | RT| RA | RB | XO |BFA |
261 |0 |6 |9 |11 |16 |22 |31 |
262 | PO | BF|//| FRA | DCM | XO | / |
263 | PO | BF|//| FRAp | DCM | XO | / |
264 | PO | BF|//| FRA | DGM | XO | / |
265 | PO | BF|//| FRAp | DGM | XO | / |
266 | PO | FRT | FRA | SH | XO |Rc |
267 | PO | FRTp| FRAp | SH | XO |Rc |
270 |0 |6 |11 |15 |16 |21 |23 |31 |
271 | PO | FRT | TE | FRB |RMC| XO |Rc |
272 | PO | FRTp| TE | FRBp |RMC| XO |Rc |
273 | PO | FRT | FRA | FRB |RMC| XO |Rc |
274 | PO | FRTp| FRA | FRBp |RMC| XO |Rc |
275 | PO | FRTp| FRAp | FRBp |RMC| XO |Rc |
276 | PO | FRT | /// | R | FRB |RMC| XO |Rc |
277 | PO | FRTp| /// | R | FRBp |RMC| XO |Rc |
280 |0 |6 |11 |16 |21 |23 |24|25|26 31|
281 | PO | SVG|rmm | SVd |ew |SVyx|mm|sk| XO |
284 |0 |6 |11 |16 |23 |24 |25 |26 |31 |
285 | PO | RT | RA | SVi |ms |vs |vf | XO |Rc |
286 | PO | RT | / | SVi |/ |/ |vf | XO |Rc |
290 | PO | SCi | SCm | SCimm |
294 | PO | SCi | SCm | SRbr | SRimm |
297 |0 |6 |11 |16 |21 |31 |
298 | PO | RT | RA| RC | SVD |
299 | PO | RS | RA| RC | SVD |
300 | PO | FRT | RA| RC | SVD |
301 | PO | FRS | RA| RC | SVD |
304 |0 |6 |11 |16 |21 |30 |31 |
305 | PO | RT | RA | RC | SVDS | XO |
306 | PO | RS | RA | RC | SVDS | XO |
309 |0 |6 |11 |16 |21 |25 |26 |31 |
310 | PO | SVxd | SVyd | SVzd | SVrm |vf | XO |
313 |0 |6 |10 |11 |16 |21 |24|25 |26 |31 |
314 | PO | SVo |SVyx| rmm | SVd |XO |mm|sk | XO |
317 |0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 |
318 | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO |
321 |0 |6 |11 |16 |21 |29 |31 |
322 | PO | RT | RA | RB | TLI | XO |Rc |
323 | PO | RT | RA | RB | TLI | XO |L |
325 # 1.6.28 Instruction Fields
327 Field used by the tbegin. instruction to specify an
328 implementation-specific function.
329 Field used by the tend. instruction to specify the
330 completion of the outer transaction and all nested
335 0 The immediate field represents an address
336 relative to the current instruction address. For
337 I-form branches the effective address of the
338 branch target is the sum of the LI field
339 sign-extended to 64 bits and the address of
340 the branch instruction. For B-form branches
341 the effective address of the branch target is
342 the sum of the BD field sign-extended to 64
343 bits and the address of the branch instruction.
344 1 The immediate field represents an absolute
345 address. For I-form branches the effective
346 address of the branch target is the LI field
347 sign-extended to 64 bits. For B-form branches
348 the effective address of the branch target is
349 the BD field sign-extended to 64 bits.
352 Fields that are concatenated to specify a VSR to
356 Field used to specify a bit in the CR to be used as
360 Field used to specify a bit in the CR to be used as
364 Field used to specify a bit in the CR to be used as
368 Immediate field used to specify a 14-bit signed
369 two's complement branch displacement which is
370 concatenated on the right with 0b00 and
371 sign-extended to 64 bits.
374 Field used to specify one of the CR fields or one of
375 the FPSCR fields to be used as a target.
376 Formats: D, X, XL, XX2, XX3, Z22
378 Field used to specify one of the CR fields
379 to be used as a source.
382 Field used to specify one of the CR fields or one of
383 the FPSCR fields to be used as a source.
386 Field used to specify one of the CR fields or one of
387 the FPSCR fields to be used as a source.
390 Field used to specify a hint in the Branch Condi-
391 tional to Link Register and Branch Conditional to
392 Count Register instructions. The encoding is
393 described in Section 2.4, 'Branch Instructions'.
396 Field used to identify the BHRB entry to be used
397 as a source by the Move From Branch History
398 Rolling Buffer instruction.
401 Field used to specify a bit in the CR to be tested by
402 a Branch Conditional instruction.
405 Field used to specify the Bit-mask Mode for bmask
408 Field used to specify options for the Branch Condi-
409 tional instructions. The encoding is described in
410 Section 2.4, 'Branch Instructions'.
411 Formats: B, XL, X, XL
413 Field used to specify a bit in the CR or in the
414 FPSCR to be used as a target.
417 Fields that are concatenated to specify a VSR to
419 Formats: XX2, XX3, XX4
421 Field used in X-form instructions to specify a cache
422 target (see Section 4.3.2 of Book II).
425 Fields that are concatenated to specify a VSR to
429 Immediate field used to specify a 16-bit signed
430 two's complement integer which is sign-extended
433 d0,d1,d2 (16:25,11:15,31)
434 Immediate fields that are concatenated to specify a
435 16-bit signed two's complement integer which is
436 sign-extended to 64 bits.
438 dc,dm,dx (25,29,11:15)
439 Immediate fields that are concatenated to specify
443 Immediate field used to specify Data Class Mask.
446 Immediate field used to specify Data Class Mask.
449 Immediate field used as the Data Group Mask.
452 Immediate field used by xxpermdi instruction as
453 doubleword permute control.
456 Immediate operand field used to specify new deci-
457 mal floating-point rounding mode.
460 Field used by the dnh instruction (see Book III-E).
463 Field used by the dnh instruction (see Book III-E).
466 Immediate field used to specify a 12-bit signed
467 two's complement integer which is concatenated
468 on the right with 0b0000 and sign-extended to 64
472 Immediate field used to specify a 14-bit signed
473 two's complement integer which is concatenated
474 on the right with 0b00 and sign-extended to 64 bits.
477 Field used to specify a hint in the Load and
478 Reserve instructions. The meaning is described in
479 Section 4.6.2, 'Load and Reserve and Store Con-
480 ditional Instructions', in Book II.
483 Expanded opcode field
486 Expanded opcode field
489 Field used to specify Inexact form of round to
490 quad-precision integer.
493 Field used to specify the element width for SVI-Form
496 Field used to specify the function code in Load/
497 Store Atomic instructions.
500 Field mask used to identify the FPSCR fields that
501 are to be updated by the mtfsf instruction.
504 Field used to specify a FPR to be used as a
506 Formats: A, X, Z22, Z23
508 Field used to specify an even/odd pair of FPRs to
509 be concatenated and used as a source.
512 Field used to specify an FPR to be used as a
514 Formats: A, X, XFL, Z23
516 Field used to specify an even/odd pair of FPRs to
517 be concatenated and used as a source.
520 Field used to specify an FPR to be used as a
524 Field used to specify an FPR to be used as a
528 Field used to specify an even/odd pair of FPRs to
529 be concatenated and used as a source.
532 Field used to specify an FPR to be used as a tar-
534 Formats: A, D, X, Z22, Z23
536 Field used to specify an even/odd pair of FPRs to
537 be concatenated and used as a target.
538 Formats: DS, X, Z22, Z23
540 Field mask used to identify the CR fields that are to
541 be written by the mtcrf and mtocrf instructions, or
542 read by the mfocrf instruction.
545 Immediate field used to specify a 5-bit signed inte-
549 Field used to specify a hint in the SLB Invalidate
550 All instruction. The meaning is described in
551 Section 5.9.3.2, 'SLB Management Instructions',
555 Immediate field used to specify an 8-bit integer.
558 Immediate field used to specify a 5-bit signed inte-
562 Field used to specify whether the mtfsf instruction
563 updates the entire FPSCR.
566 Field used by the Data Cache Block Flush instruc-
567 tion (see Section 4.3.2 of Book II) and also by the
568 Synchronize instruction (see Section 4.6.3 of Book
572 Field used to specify whether a fixed-point Com-
573 pare instruction is to compare 64-bit numbers or
575 Field used by the Compare Range Byte instruction
576 to indicate whether to compare against 1 or 2
580 Field used by the Move To Machine State Register
581 instruction (see Book III).
582 Field used by the SLB Move From Entry VSID and
583 SLB Move From Entry ESID instructions for imple-
584 mentation-specific purposes.
587 Field used by the Deliver A Random Number
588 instruction (see Section 3.3.9, 'Fixed-Point Arith-
589 metic Instructions') to choose the random number
593 Field used to specify whether mask-in occurs in bmask
596 Field used to specify whether the grevlut instruction
597 updates the whole GPR or the first half.
600 Field used by the System Call instructions.
603 Immediate field used to specify a 24-bit signed
604 two's complement integer which is concatenated
605 on the right with 0b00 and sign-extended to 64
610 0 Do not set the Link Register.
611 1 Set the Link Register. The address of the
612 instruction following the Branch instruction is
613 placed into the Link Register.
616 Field used to specify a REMAP shape for SVI-Form
619 Field used in M-form instructions to specify the first
620 1-bit of a 64-bit mask, as described in
621 Section 3.3.14, 'Fixed-Point Rotate and Shift
622 Instructions' on page 101.
625 Field used in MD-form and MDS-form instructions
626 to specify the first 1-bit of a 64-bit mask, as
627 described in Section 3.3.14, 'Fixed-Point Rotate
628 and Shift Instructions' on page 101.
631 Field used in MD-form and MDS-form instructions
632 to specify the last 1-bit of a 64-bit mask, as
633 described in Section 3.3.14, 'Fixed-Point Rotate
634 and Shift Instructions' on page 101.
637 Field used in M-form instructions to specify the last
638 1-bit of a 64-bit mask, as described in
639 Section 3.3.14, 'Fixed-Point Rotate and Shift
640 Instructions' on page 101.
643 Field used in REMAP to select the SVSHAPE for 1st input register
646 Field used in REMAP to select the SVSHAPE for 2nd input register
649 Field used in REMAP to select the SVSHAPE for 3rd input register
652 Field used to specify the meaning of the rmm field for SVI-Form
656 Field used in REMAP to select the SVSHAPE for 1st output register
659 Field used in REMAP to select the SVSHAPE for 2nd output register
662 Field used in X-form instructions to specify a sub-
663 set of storage accesses.
666 Field used in Simple-V to specify whether MVL is to be set
669 Field used to specify the number of bytes to move
670 in an immediate Move Assist instruction.
673 Field used by the Embedded Hypervisor Privilege
677 Field used by XO-form instructions to enable set-
678 ting OV and SO in the XER.
681 Primary opcode field.
684 Field used to specify whether to invalidate pro-
685 cess- or partition-scoped entries for tlbie[l].
688 Field used to specify preferred sign for BCD opera-
692 Field used in REMAP to indicate "persistence" mode (REMAP
693 continues to apply to multiple instructions)
696 Immediate field used to specify a 4-bit unsigned
700 Field used by the tbegin. instruction to specify the
704 Immediate field that specifies whether the RMC is
705 specifying the primary or secondary encoding
706 Field used to specify whether to invalidate Radix
707 Tree or HPT entries for tlbie[l].
710 Field used to specify a GPR to be used as a
711 source or as a target.
712 Formats: A, BM2, D, DQ, DQE, DS, M, MD, MDS, TX, VA, VA2, VX, X, XO, XS, SVL, XB, TLI
714 Field used to specify a GPR to be used as a
716 Formats: A, BM2, M, MDS, VA, VA2, X, XO, TLI
719 0 Do not alter the Condition Register.
720 1 Set Condition Register Field 6 as described in
721 Section 2.3.1, 'Condition Register' on
725 Field used to specify a GPR to be used as a
727 Formats: VA, VA2, SVD, SVDS
730 0 Do not alter the Condition Register.
731 1 Set Condition Register Field 0 or Field 1 as
732 described in Section 2.3.1, 'Condition Regis-
734 Formats: A, M, MD, MDS, VA2, X, XFL, XO, XS, Z22, Z23, SVL, XB, TLI
736 Field used to specify what types of entries to inval-
740 Immediate operand field used to specify new
741 binary floating-point rounding mode.
744 Immediate field used for DFP rounding mode con-
748 REMAP Mode field for SVI-Form and SVM2-Form
751 Round to Odd override
754 Field used to specify a GPR to be used as a
756 Formats: D, DS, M, MD, MDS, X, XFX, XS
758 Field used to specify an even/odd pair of GPRs to
759 be concatenated and used as a source.
762 Field used to specify a GPR to be used as a target.
763 Formats: A, BM2, D, DQE, DS, DX, VA, VA2, VX, X, XFX, XO, XX2, SVL, XB, TLI
765 Field used to specify an even/odd pair of GPRs to
766 be concatenated and used as a target.
769 Immediate field that specifies signed versus
773 Immediate field that specifies whether or not the
774 rfebb instruction re-enables event-based
778 Index to SV Context Propagation SPR
781 SV Context Propagation Mode
784 SV Context Propagation immediate bitfield
787 SV REMAP byte-reversal field.
790 SV REMAP immediate FIFO bitfield
793 Field used to specify a shift amount.
796 Field used to specify a shift amount.
799 Fields that are concatenated to specify a shift
803 Field used to specify a shift amount in bytes.
806 Field used to specify a shift amount in words.
809 Immediate field used to specify a 5-bit signed inte-
813 Immediate field used to specify a 16-bit signed
817 Immediate field used to specify a 5-bit signed inte-
821 Field used to specify dimensional skipping in svindex
824 Immediate field that specifies signed versus
828 Field used to specify a Special Purpose Register
829 for the mtspr and mfspr instructions.
832 Field used by the Segment Register Manipulation
833 instructions (see Book III).
836 Immediate field used to specify the size of the REMAP dimension
837 in the svindex and svshape2 instructions
840 Immediate field used to specify an 11-bit signed
841 two's complement integer which is sign-extended
845 Immediate field used to specify a 9-bit signed
846 two's complement integer which is concatenated
847 on the right with 0b00 and sign-extended to 64 bits.
850 Field used to specify a GPR to be used as a
854 Simple-V immediate field for setting VL or MVL
857 Simple-V "REMAP" map-enable bits (0-4)
860 Field used by the svshape2 instruction as an offset
863 Simple-V "REMAP" Mode
866 Simple-V "REMAP" x-dimension size
869 Simple-V "REMAP" y-dimension size
872 Simple-V "REMAP" z-dimension size
875 Fields SX and S are concatenated to specify a
876 VSR to be used as a source.
879 Fields SX and S are concatenated to specify a
880 VSR to be used as a source.
883 Field used to specify the type of invalidation done
884 by a TLB Invalidate Local instruction (see Book
888 Field used by the Move From Time Base instruc-
889 tion (see Section 6.1 of Book II).
892 Immediate field that specifies a DFP exponent.
895 Field used by the data stream variant of the dcbt
896 and dcbtst instructions (see Section 4.3.2 of Book
900 Field used by the ternlogi instruction as the
904 Field used to specify the conditions on which to
905 trap. The encoding is described in
906 Section 3.3.10.1, 'Character-Type Compare
907 Instructions' on page 87.
910 Fields that are concatenated to specify a VSR to
911 be used as either a target.
914 Fields that are concatenated to specify a VSR to
915 be used as either a target or a source.
916 Formats: X, XX2, XX3, XX4
918 Immediate field used as the data to be placed into
919 a field in the FPSCR.
922 Immediate field used to specify a 5-bit unsigned
926 Immediate field used to specify a 16-bit unsigned
930 Immediate field used to specify a 5-bit unsigned
934 Immediate field used to specify a 4-bit unsigned
938 Immediate field used to specify a 3-bit unsigned
942 Immediate field used to specify a 2-bit unsigned
946 Field used to specify a VR to be used as a source.
949 Field used to specify a VR to be used as a source.
952 Field used to specify a VR to be used as a source.
955 Field used to specify a VR to be used as a source.
958 Field used to specify a VR to be used as a target.
959 Formats: DS, VA, VC, VX, X
961 Field used in Simple-V to specify whether "Vertical" Mode is set
964 Field used in Simple-V to specify whether VL is to be set
967 Field used by the mtfsfi and mtfsf instructions to
968 specify the target word in the FPSCR.
971 Field used to specify the condition or conditions
972 that cause instruction execution to resume after
973 executing a wait instruction (see Section 4.6.4 of
977 Field used to specify a bit in the XER.
978 Formats: MDS, MDS, TX
980 Field used to specify a 6-bit unsigned immediate for bit manipulation
981 instructions, such as grevi.
984 Extended opcode field.
987 Extended opcode field.
990 Extended opcode field.
993 Extended opcode field.
996 Extended opcode field.
999 Extended opcode field.
1002 Extended opcode field.
1003 Formats: X, XFL, XFX, XL
1005 Extended opcode field.
1008 Extended opcode field.
1009 Formats: XO, XX3, Z22, XB
1011 Extended opcode field.
1014 Extended opcode field.
1017 Extended opcode field.
1020 Extended opcode field.
1023 Extended opcode field.
1024 Formats: A, DX, VA2, SVL
1026 Extended opcode field.
1027 Formats: VA, SVM, SVRM, SVI
1029 Extended opcode field.
1032 Extended opcode field.
1035 Extended opcode field.
1038 Extended opcode field.
1041 Extended opcode field.
1044 Extended opcode field.
1045 Formats: DQE, DS, SC
1047 Field used to specify loop dimension order in svindex
1050 Field used to specify loop dimension order in svshape2