src/openpower/decoder/helpers.py

   1 import unittest
   2 import struct
   3 from openpower.decoder.selectable_int import (SelectableInt, onebit,
   4                                               selectconcat)
   5 from nmutil.divmod import trunc_divs, trunc_rems
   6 from operator import floordiv, mod
   7 from openpower.decoder.selectable_int import selectltu as ltu
   8 from openpower.decoder.selectable_int import selectgtu as gtu
   9 from openpower.decoder.selectable_int import check_extsign
  10
  11 from openpower.util import log
  12
  13 trunc_div = floordiv
  14 trunc_rem = mod
  15 DIVS = trunc_divs
  16 MODS = trunc_rems
  17
  18 """
  19 Links:
  20 * https://bugs.libre-soc.org/show_bug.cgi?id=324 - add trunc_div and trunc_rem
  21 """
  22
  23
  24 def exts(value, bits):
  25     sign = 1 << (bits - 1)
  26     return (value & (sign - 1)) - (value & sign)
  27
  28
  29 def EXTS(value):
  30     """ extends sign bit out from current MSB to all 256 bits
  31     """
  32     log ("EXTS", value, type(value))
  33     assert isinstance(value, SelectableInt)
  34     return SelectableInt(exts(value.value, value.bits) & ((1 << 256)-1), 256)
  35
  36
  37 def EXTS64(value):
  38     """ extends sign bit out from current MSB to 64 bits
  39     """
  40     assert isinstance(value, SelectableInt)
  41     return SelectableInt(exts(value.value, value.bits) & ((1 << 64)-1), 64)
  42
  43
  44 def EXTS128(value):
  45     """ extends sign bit out from current MSB to 128 bits
  46     """
  47     assert isinstance(value, SelectableInt)
  48     return SelectableInt(exts(value.value, value.bits) & ((1 << 128)-1), 128)
  49
  50
  51 # signed version of MUL
  52 def MULS(a, b):
  53     if isinstance(b, int):
  54         b = SelectableInt(b, self.bits)
  55     b = check_extsign(a, b)
  56     a_s = a.value & (1 << (a.bits-1)) != 0
  57     b_s = b.value & (1 << (b.bits-1)) != 0
  58     result = abs(a) * abs(b)
  59     log("MULS", result, a_s, b_s)
  60     if a_s == b_s:
  61         return result
  62     return -result
  63
  64
  65 # XXX should this explicitly extend from 32 to 64?
  66 def EXTZ64(value):
  67     if isinstance(value, SelectableInt):
  68         value = value.value
  69     return SelectableInt(value & ((1 << 32)-1), 64)
  70
  71
  72 def rotl(value, bits, wordlen):
  73     if isinstance(bits, SelectableInt):
  74         bits = bits.value
  75     mask = (1 << wordlen) - 1
  76     bits = bits & (wordlen - 1)
  77     return ((value << bits) | (value >> (wordlen-bits))) & mask
  78
  79
  80 def ROTL64(value, bits):
  81     return rotl(value, bits, 64)
  82
  83
  84 def ROTL32(value, bits):
  85     if isinstance(bits, SelectableInt):
  86         bits = bits.value
  87     if isinstance(value, SelectableInt):
  88         value = SelectableInt(value.value, 64)
  89     return rotl(value | (value << 32), bits, 64)
  90
  91 def MASK32(x, y):
  92     if isinstance(x, SelectableInt):
  93         x = x.value
  94     if isinstance(y, SelectableInt):
  95         y = y.value
  96     return MASK(x+32, y+32)
  97
  98 def MASK(x, y):
  99     if isinstance(x, SelectableInt):
 100         x = x.value
 101     if isinstance(y, SelectableInt):
 102         y = y.value
 103     if x < y:
 104         x = 64-x
 105         y = 63-y
 106         mask_a = ((1 << x) - 1) & ((1 << 64) - 1)
 107         mask_b = ((1 << y) - 1) & ((1 << 64) - 1)
 108     elif x == y:
 109         return 1 << (63-x)
 110     else:
 111         x = 64-x
 112         y = 63-y
 113         mask_a = ((1 << x) - 1) & ((1 << 64) - 1)
 114         mask_b = (~((1 << y) - 1)) & ((1 << 64) - 1)
 115     return mask_a ^ mask_b
 116
 117
 118 def ne(a, b):
 119     return onebit(a != b)
 120
 121
 122 def eq(a, b):
 123     return onebit(a == b)
 124
 125
 126 def gt(a, b):
 127     return onebit(a > b)
 128
 129
 130 def ge(a, b):
 131     return onebit(a >= b)
 132
 133
 134 def lt(a, b):
 135     return onebit(a < b)
 136
 137
 138 def le(a, b):
 139     return onebit(a <= b)
 140
 141
 142 def length(a):
 143     return len(a)
 144
 145
 146 def undefined(v):
 147     """ function that, for Power spec purposes, returns undefined bits of
 148         the same shape as the input bits.  however, for purposes of matching
 149         POWER9's behavior returns the input bits unchanged.  this effectively
 150         "marks" (tags) locations in the v3.0B spec that need to be submitted
 151         for clarification.
 152     """
 153     return v
 154
 155 def DOUBLE(WORD):
 156     """convert incoming WORD to double.  v3.0B p140 section 4.6.2
 157     """
 158     # result, FRT, start off all zeros
 159     log ("WORD", WORD)
 160     FRT = SelectableInt(0, 64)
 161     z1 = SelectableInt(0, 1)
 162     z29 = SelectableInt(0, 29)
 163     e = WORD[1:9]
 164     m = WORD[9:32]
 165     s = WORD[0]
 166     log ("word s e m", s, e, m)
 167
 168     # Normalized Operand
 169     if e.value > 0 and e.value  < 255:
 170         log ("normalised")
 171         FRT[0:2] = WORD[0:2]
 172         FRT[2] = ~WORD[1]
 173         FRT[3] = ~WORD[1]
 174         FRT[4] = ~WORD[1]
 175         FRT[5:64] = selectconcat(WORD[2:32], z29)
 176
 177     # Denormalized Operand
 178     if e.value  == 0 and m.value != 0:
 179         log ("denormalised")
 180         sign = WORD[0]
 181         exp = -126
 182         frac = selectconcat(z1, WORD[9:32], z29)
 183         # normalize the operand
 184         while frac[0].value  == 0:
 185             frac[0:53] = selectconcat(frac[1:53], z1)
 186             exp = exp - 1
 187         FRT[0] = sign
 188         FRT[1:12] = exp + 1023
 189         FRT[12:64] = frac[1:53]
 190
 191     # Zero / Infinity / NaN
 192     if e.value  == 255 or m.value  == 0:
 193         log ("z/inf/nan")
 194         FRT[0:2] = WORD[0:2]
 195         FRT[2] = WORD[1]
 196         FRT[3] = WORD[1]
 197         FRT[4] = WORD[1]
 198         FRT[5:64] = selectconcat(WORD[2:32], z29)
 199
 200     log ("Double s e m", FRT[0].value, FRT[1:12].value-1023,
 201                            FRT[12:64].value)
 202
 203     return FRT
 204
 205
 206 def SINGLE(FRS):
 207     """convert incoming FRS into 32-bit word.  v3.0B p144 section 4.6.3
 208     """
 209     # result - WORD - start off all zeros
 210     WORD = SelectableInt(0, 32)
 211
 212     e = FRS[1:12]
 213     m = FRS[12:64]
 214     s = FRS[0]
 215
 216     log ("SINGLE", FRS)
 217     log ("s e m", s.value, e.value, m.value)
 218
 219     #No Denormalization Required (includes Zero / Infinity / NaN)
 220     if e.value > 896 or FRS[1:64].value  == 0:
 221           log("nodenorm", FRS[0:2].value, hex(FRS[5:35].value))
 222           WORD[0:2] = FRS[0:2]
 223           WORD[2:32] = FRS[5:35]
 224
 225     #Denormalization Required
 226     if e.value  >= 874 and e.value <= 896:
 227           sign = FRS[0]
 228           exp = e.value - 1023
 229           frac = selectconcat(SelectableInt(1, 1), FRS[12:64])
 230           log("exp, fract", exp, hex(frac.value))
 231           # denormalize operand
 232           while exp < -126:
 233               frac[0:53] = selectconcat(SelectableInt(0, 1), frac[0:52])
 234               exp = exp + 1
 235           WORD[0] = sign
 236           WORD[1:9] = SelectableInt(0, 8)
 237           WORD[9:32] = frac[1:24]
 238     #else WORD = undefined # return zeros
 239
 240     log ("WORD", WORD)
 241
 242     return WORD
 243
 244 # XXX NOTE: these are very quick hacked functions for utterly basic
 245 # FP support
 246
 247 def fp64toselectable(frt):
 248     """convert FP number to 64 bit SelectableInt
 249     """
 250     b = struct.pack(">d", frt)
 251     val = int.from_bytes(b, byteorder='big', signed=False)
 252     return SelectableInt(val, 64)
 253
 254
 255 def FPADD32(FRA, FRB):
 256     FRA = DOUBLE(SINGLE(FRA))
 257     FRB = DOUBLE(SINGLE(FRB))
 258     result = float(FRA) + float(FRB)
 259     cvt = fp64toselectable(result)
 260     cvt = DOUBLE(SINGLE(cvt))
 261     log ("FPADD32", FRA, FRB, result, cvt)
 262     return cvt
 263
 264
 265 def FPSUB32(FRA, FRB):
 266     FRA = DOUBLE(SINGLE(FRA))
 267     FRB = DOUBLE(SINGLE(FRB))
 268     result = float(FRA) - float(FRB)
 269     cvt = fp64toselectable(result)
 270     cvt = DOUBLE(SINGLE(cvt))
 271     log ("FPSUB32", FRA, FRB, result, cvt)
 272     return cvt
 273
 274
 275 def FPMUL32(FRA, FRB):
 276     FRA = DOUBLE(SINGLE(FRA))
 277     FRB = DOUBLE(SINGLE(FRB))
 278     result = float(FRA) * float(FRB)
 279     cvt = fp64toselectable(result)
 280     cvt = DOUBLE(SINGLE(cvt))
 281     log ("FPMUL32", FRA, FRB, result, cvt)
 282     return cvt
 283
 284
 285 def FPDIV32(FRA, FRB):
 286     FRA = DOUBLE(SINGLE(FRA))
 287     FRB = DOUBLE(SINGLE(FRB))
 288     result = float(FRA) / float(FRB)
 289     cvt = fp64toselectable(result)
 290     cvt = DOUBLE(SINGLE(cvt))
 291     log ("FPDIV32", FRA, FRB, result, cvt)
 292     return cvt
 293
 294
 295 def FPADD64(FRA, FRB):
 296     result = float(FRA) + float(FRB)
 297     cvt = fp64toselectable(result)
 298     log ("FPADD64", FRA, FRB, result, cvt)
 299     return cvt
 300
 301
 302 def FPSUB64(FRA, FRB):
 303     result = float(FRA) - float(FRB)
 304     cvt = fp64toselectable(result)
 305     log ("FPSUB64", FRA, FRB, result, cvt)
 306     return cvt
 307
 308
 309 def FPMUL64(FRA, FRB):
 310     result = float(FRA) * float(FRB)
 311     cvt = fp64toselectable(result)
 312     log ("FPMUL64", FRA, FRB, result, cvt)
 313     return cvt
 314
 315
 316 def FPDIV64(FRA, FRB):
 317     result = float(FRA) / float(FRB)
 318     cvt = fp64toselectable(result)
 319     log ("FPDIV64", FRA, FRB, result, cvt)
 320     return cvt
 321
 322
 323 # For these tests I tried to find power instructions that would let me
 324 # isolate each of these helper operations. So for instance, when I was
 325 # testing the MASK() function, I chose rlwinm and rldicl because if I
 326 # set the shift equal to 0 and passed in a value of all ones, the
 327 # result I got would be exactly the same as the output of MASK()
 328
 329
 330 class HelperTests(unittest.TestCase):
 331     def test_MASK(self):
 332         # Verified using rlwinm, rldicl, rldicr in qemu
 333         # li 1, -1
 334         # rlwinm reg, 1, 0, 5, 15
 335         self.assertHex(MASK(5+32, 15+32), 0x7ff0000)
 336         # rlwinm reg, 1, 0, 15, 5
 337         self.assertHex(MASK(15+32, 5+32), 0xfffffffffc01ffff)
 338         self.assertHex(MASK(30+32, 2+32), 0xffffffffe0000003)
 339         # rldicl reg, 1, 0, 37
 340         self.assertHex(MASK(37, 63), 0x7ffffff)
 341         self.assertHex(MASK(10, 63), 0x3fffffffffffff)
 342         self.assertHex(MASK(58, 63), 0x3f)
 343         # rldicr reg, 1, 0, 37
 344         self.assertHex(MASK(0, 37), 0xfffffffffc000000)
 345         self.assertHex(MASK(0, 10), 0xffe0000000000000)
 346         self.assertHex(MASK(0, 58), 0xffffffffffffffe0)
 347
 348         # li 2, 5
 349         # slw 1, 1, 2
 350         self.assertHex(MASK(32, 63-5), 0xffffffe0)
 351
 352         self.assertHex(MASK(32, 33), 0xc0000000)
 353         self.assertHex(MASK(32, 32), 0x80000000)
 354         self.assertHex(MASK(33, 33), 0x40000000)
 355
 356     def test_ROTL64(self):
 357         # r1 = 0xdeadbeef12345678
 358         value = 0xdeadbeef12345678
 359
 360         # rldicl reg, 1, 10, 0
 361         self.assertHex(ROTL64(value, 10), 0xb6fbbc48d159e37a)
 362         # rldicl reg, 1, 35, 0
 363         self.assertHex(ROTL64(value, 35), 0x91a2b3c6f56df778)
 364         self.assertHex(ROTL64(value, 58), 0xe37ab6fbbc48d159)
 365         self.assertHex(ROTL64(value, 22), 0xbbc48d159e37ab6f)
 366
 367     def test_ROTL32(self):
 368         # r1 = 0xdeadbeef
 369         value = 0xdeadbeef
 370
 371         # rlwinm reg, 1, 10, 0, 31
 372         self.assertHex(ROTL32(value, 10), 0xb6fbbf7a)
 373         # rlwinm reg, 1, 17, 0, 31
 374         self.assertHex(ROTL32(value, 17), 0x7ddfbd5b)
 375         self.assertHex(ROTL32(value, 25), 0xdfbd5b7d)
 376         self.assertHex(ROTL32(value, 30), 0xf7ab6fbb)
 377
 378     def test_EXTS64(self):
 379         value_a = SelectableInt(0xdeadbeef, 32)  # r1
 380         value_b = SelectableInt(0x73123456, 32)  # r2
 381         value_c = SelectableInt(0x80000000, 32)  # r3
 382
 383         # extswsli reg, 1, 0
 384         self.assertHex(EXTS64(value_a), 0xffffffffdeadbeef)
 385         # extswsli reg, 2, 0
 386         self.assertHex(EXTS64(value_b), SelectableInt(value_b.value, 64))
 387         # extswsli reg, 3, 0
 388         self.assertHex(EXTS64(value_c), 0xffffffff80000000)
 389
 390     def test_FPADD32(self):
 391         value_a = SelectableInt(0x4014000000000000, 64)  # 5.0
 392         value_b = SelectableInt(0x403B4CCCCCCCCCCD, 64)  # 27.3
 393         result = FPADD32(value_a, value_b)
 394         self.assertHex(0x4040266666666666, result)
 395
 396     def assertHex(self, a, b):
 397         a_val = a
 398         if isinstance(a, SelectableInt):
 399             a_val = a.value
 400         b_val = b
 401         if isinstance(b, SelectableInt):
 402             b_val = b.value
 403         msg = "{:x} != {:x}".format(a_val, b_val)
 404         return self.assertEqual(a, b, msg)
 405
 406
 407 if __name__ == '__main__':
 408     log(SelectableInt.__bases__)
 409     unittest.main()