Add expected state to case_1_regression for subf in alu_cases unit test
[openpower-isa.git] / src / openpower / test / alu / alu_cases.py
1 import random
2 from openpower.test.common import TestAccumulatorBase
3 from openpower.endian import bigendian
4 from openpower.simulator.program import Program
5 from openpower.decoder.selectable_int import SelectableInt
6 from openpower.decoder.power_enums import XER_bits
7 from openpower.decoder.isa.caller import special_sprs
8 from openpower.test.state import ExpectedState
9 import unittest
10
11
12 class ALUTestCase(TestAccumulatorBase):
13
14 def case_1_regression(self):
15 lst = [f"extsw 3, 1"]
16 initial_regs = [0] * 32
17 initial_regs[1] = 0xb6a1fc6c8576af91
18 e = ExpectedState(pc=4)
19 e.intregs[1] = 0xb6a1fc6c8576af91
20 e.intregs[3] = 0xffffffff8576af91
21 self.add_case(Program(lst, bigendian), initial_regs, expected=e)
22 lst = [f"subf 3, 1, 2"]
23 initial_regs = [0] * 32
24 initial_regs[1] = 0x3d7f3f7ca24bac7b
25 initial_regs[2] = 0xf6b2ac5e13ee15c2
26 e = ExpectedState(pc=4)
27 e.intregs[1] = 0x3d7f3f7ca24bac7b
28 e.intregs[2] = 0xf6b2ac5e13ee15c2
29 e.intregs[3] = 0xb9336ce171a26947
30 self.add_case(Program(lst, bigendian), initial_regs, expected=e)
31 lst = [f"subf 3, 1, 2"]
32 initial_regs = [0] * 32
33 initial_regs[1] = 0x833652d96c7c0058
34 initial_regs[2] = 0x1c27ecff8a086c1a
35 self.add_case(Program(lst, bigendian), initial_regs)
36 lst = [f"extsb 3, 1"]
37 initial_regs = [0] * 32
38 initial_regs[1] = 0x7f9497aaff900ea0
39 self.add_case(Program(lst, bigendian), initial_regs)
40 lst = [f"add. 3, 1, 2"]
41 initial_regs = [0] * 32
42 initial_regs[1] = 0xc523e996a8ff6215
43 initial_regs[2] = 0xe1e5b9cc9864c4a8
44 self.add_case(Program(lst, bigendian), initial_regs)
45 lst = [f"add 3, 1, 2"]
46 initial_regs = [0] * 32
47 initial_regs[1] = 0x2e08ae202742baf8
48 initial_regs[2] = 0x86c43ece9efe5baa
49 self.add_case(Program(lst, bigendian), initial_regs)
50
51 def case_rand(self):
52 insns = ["add", "add.", "subf"]
53 for i in range(40):
54 choice = random.choice(insns)
55 lst = [f"{choice} 3, 1, 2"]
56 initial_regs = [0] * 32
57 initial_regs[1] = random.randint(0, (1 << 64)-1)
58 initial_regs[2] = random.randint(0, (1 << 64)-1)
59 self.add_case(Program(lst, bigendian), initial_regs)
60
61 def case_addme_ca_0(self):
62 insns = ["addme", "addme.", "addmeo", "addmeo."]
63 for choice in insns:
64 lst = [f"{choice} 6, 16"]
65 for value in [0x7ffffffff,
66 0xffff80000]:
67 initial_regs = [0] * 32
68 initial_regs[16] = value
69 initial_sprs = {}
70 xer = SelectableInt(0, 64)
71 xer[XER_bits['CA']] = 0
72 initial_sprs[special_sprs['XER']] = xer
73 self.add_case(Program(lst, bigendian),
74 initial_regs, initial_sprs)
75
76 def case_addme_ca_1(self):
77 insns = ["addme", "addme.", "addmeo", "addmeo."]
78 for choice in insns:
79 lst = [f"{choice} 6, 16"]
80 for value in [0x7ffffffff, # fails, bug #476
81 0xffff80000]:
82 initial_regs = [0] * 32
83 initial_regs[16] = value
84 initial_sprs = {}
85 xer = SelectableInt(0, 64)
86 xer[XER_bits['CA']] = 1
87 initial_sprs[special_sprs['XER']] = xer
88 self.add_case(Program(lst, bigendian),
89 initial_regs, initial_sprs)
90
91 def case_addme_ca_so_3(self):
92 """bug where SO does not get passed through to CR0
93 """
94 lst = ["addme. 6, 16"]
95 initial_regs = [0] * 32
96 initial_regs[16] = 0x7ffffffff
97 initial_sprs = {}
98 xer = SelectableInt(0, 64)
99 xer[XER_bits['CA']] = 1
100 xer[XER_bits['SO']] = 1
101 initial_sprs[special_sprs['XER']] = xer
102 self.add_case(Program(lst, bigendian),
103 initial_regs, initial_sprs)
104
105 def case_addze(self):
106 insns = ["addze", "addze.", "addzeo", "addzeo."]
107 for choice in insns:
108 lst = [f"{choice} 6, 16"]
109 initial_regs = [0] * 32
110 initial_regs[16] = 0x00ff00ff00ff0080
111 self.add_case(Program(lst, bigendian), initial_regs)
112
113 self.add_case(Program(lst, bigendian), initial_regs)
114
115 def case_addis_nonzero_r0_regression(self):
116 lst = [f"addis 3, 0, 1"]
117 print(lst)
118 initial_regs = [0] * 32
119 initial_regs[0] = 5
120 e = ExpectedState(initial_regs, pc=4)
121 e.intregs[3] = 0x10000
122 self.add_case(Program(lst, bigendian), initial_regs, expected=e)
123
124 def case_addis_nonzero_r0(self):
125 for i in range(10):
126 imm = random.randint(-(1 << 15), (1 << 15)-1)
127 lst = [f"addis 3, 0, {imm}"]
128 print(lst)
129 initial_regs = [0] * 32
130 initial_regs[0] = random.randint(0, (1 << 64)-1)
131 self.add_case(Program(lst, bigendian), initial_regs)
132
133 def case_rand_imm(self):
134 insns = ["addi", "addis", "subfic"]
135 for i in range(10):
136 choice = random.choice(insns)
137 imm = random.randint(-(1 << 15), (1 << 15)-1)
138 lst = [f"{choice} 3, 1, {imm}"]
139 print(lst)
140 initial_regs = [0] * 32
141 initial_regs[1] = random.randint(0, (1 << 64)-1)
142 self.add_case(Program(lst, bigendian), initial_regs)
143
144 def case_0_adde(self):
145 lst = ["adde. 5, 6, 7"]
146 for i in range(10):
147 initial_regs = [0] * 32
148 initial_regs[6] = random.randint(0, (1 << 64)-1)
149 initial_regs[7] = random.randint(0, (1 << 64)-1)
150 initial_sprs = {}
151 xer = SelectableInt(0, 64)
152 xer[XER_bits['CA']] = 1
153 initial_sprs[special_sprs['XER']] = xer
154 self.add_case(Program(lst, bigendian),
155 initial_regs, initial_sprs)
156
157 def case_cmp(self):
158 lst = ["subf. 1, 6, 7",
159 "cmp cr2, 1, 6, 7"]
160 initial_regs = [0] * 32
161 initial_regs[6] = 0x10
162 initial_regs[7] = 0x05
163 self.add_case(Program(lst, bigendian), initial_regs, {})
164
165 def case_cmp2(self):
166 lst = ["cmp cr2, 0, 2, 3"]
167 initial_regs = [0] * 32
168 initial_regs[2] = 0xffffffffaaaaaaaa
169 initial_regs[3] = 0x00000000aaaaaaaa
170 self.add_case(Program(lst, bigendian), initial_regs, {})
171
172 lst = ["cmp cr2, 0, 4, 5"]
173 initial_regs = [0] * 32
174 initial_regs[4] = 0x00000000aaaaaaaa
175 initial_regs[5] = 0xffffffffaaaaaaaa
176 self.add_case(Program(lst, bigendian), initial_regs, {})
177
178 def case_cmp3(self):
179 lst = ["cmp cr2, 1, 2, 3"]
180 initial_regs = [0] * 32
181 initial_regs[2] = 0xffffffffaaaaaaaa
182 initial_regs[3] = 0x00000000aaaaaaaa
183 self.add_case(Program(lst, bigendian), initial_regs, {})
184
185 lst = ["cmp cr2, 1, 4, 5"]
186 initial_regs = [0] * 32
187 initial_regs[4] = 0x00000000aaaaaaaa
188 initial_regs[5] = 0xffffffffaaaaaaaa
189 self.add_case(Program(lst, bigendian), initial_regs, {})
190
191 def case_cmpl_microwatt_0(self):
192 """microwatt 1.bin:
193 115b8: 40 50 d1 7c .long 0x7cd15040 # cmpl 6, 0, 17, 10
194 register_file.vhdl: Reading GPR 11 000000000001C026
195 register_file.vhdl: Reading GPR 0A FEDF3FFF0001C025
196 cr_file.vhdl: Reading CR 35055050
197 cr_file.vhdl: Writing 35055058 to CR mask 01 35055058
198 """
199
200 lst = ["cmpl 6, 0, 17, 10"]
201 initial_regs = [0] * 32
202 initial_regs[0x11] = 0x1c026
203 initial_regs[0xa] = 0xFEDF3FFF0001C025
204 XER = 0xe00c0000
205 CR = 0x35055050
206
207 self.add_case(Program(lst, bigendian), initial_regs,
208 initial_sprs = {'XER': XER},
209 initial_cr = CR)
210
211 def case_cmpl_microwatt_0_disasm(self):
212 """microwatt 1.bin: disassembled version
213 115b8: 40 50 d1 7c .long 0x7cd15040 # cmpl 6, 0, 17, 10
214 register_file.vhdl: Reading GPR 11 000000000001C026
215 register_file.vhdl: Reading GPR 0A FEDF3FFF0001C025
216 cr_file.vhdl: Reading CR 35055050
217 cr_file.vhdl: Writing 35055058 to CR mask 01 35055058
218 """
219
220 dis = ["cmpl 6, 0, 17, 10"]
221 lst = bytes([0x40, 0x50, 0xd1, 0x7c]) # 0x7cd15040
222 initial_regs = [0] * 32
223 initial_regs[0x11] = 0x1c026
224 initial_regs[0xa] = 0xFEDF3FFF0001C025
225 XER = 0xe00c0000
226 CR = 0x35055050
227
228 p = Program(lst, bigendian)
229 p.assembly = '\n'.join(dis)+'\n'
230 self.add_case(p, initial_regs,
231 initial_sprs = {'XER': XER},
232 initial_cr = CR)
233
234 def case_cmplw_microwatt_1(self):
235 """microwatt 1.bin:
236 10d94: 40 20 96 7c cmplw cr1,r22,r4
237 gpr: 00000000ffff6dc1 <- r4
238 gpr: 0000000000000000 <- r22
239 """
240
241 lst = ["cmpl 1, 0, 22, 4"]
242 initial_regs = [0] * 32
243 initial_regs[4] = 0xffff6dc1
244 initial_regs[22] = 0
245 XER = 0xe00c0000
246 CR = 0x50759999
247
248 self.add_case(Program(lst, bigendian), initial_regs,
249 initial_sprs = {'XER': XER},
250 initial_cr = CR)
251
252 def case_cmpli_microwatt(self):
253 """microwatt 1.bin: cmpli
254 123ac: 9c 79 8d 2a cmpli cr5,0,r13,31132
255 gpr: 00000000301fc7a7 <- r13
256 cr : 0000000090215393
257 xer: so 1 ca 0 32 0 ov 0 32 0
258
259 """
260
261 lst = ["cmpli 5, 0, 13, 31132"]
262 initial_regs = [0] * 32
263 initial_regs[13] = 0x301fc7a7
264 XER = 0xe00c0000
265 CR = 0x90215393
266
267 self.add_case(Program(lst, bigendian), initial_regs,
268 initial_sprs = {'XER': XER},
269 initial_cr = CR)
270
271 def case_extsb(self):
272 insns = ["extsb", "extsh", "extsw"]
273 for i in range(10):
274 choice = random.choice(insns)
275 lst = [f"{choice} 3, 1"]
276 print(lst)
277 initial_regs = [0] * 32
278 initial_regs[1] = random.randint(0, (1 << 64)-1)
279 self.add_case(Program(lst, bigendian), initial_regs)
280
281 def case_cmpeqb(self):
282 lst = ["cmpeqb cr1, 1, 2"]
283 for i in range(20):
284 initial_regs = [0] * 32
285 initial_regs[1] = i
286 initial_regs[2] = 0x0001030507090b0f
287 self.add_case(Program(lst, bigendian), initial_regs, {})
288