src/openpower/test/shift_rot/shift_rot_cases2.py

   1 from openpower.test.common import TestAccumulatorBase
   2 from openpower.endian import bigendian
   3 from openpower.simulator.program import Program
   4 from openpower.decoder.selectable_int import SelectableInt
   5 from openpower.test.state import ExpectedState
   6 import unittest
   7
   8
   9 class ShiftRotTestCase2(TestAccumulatorBase):
  10
  11     def case_0_proof_regression_rlwnm(self):
  12         lst = ["rlwnm 3, 1, 2, 16, 20"]
  13         initial_regs = [0] * 32
  14         #initial_regs[1] =0x7ffdbffb91b906b9
  15         initial_regs[1] = 0x11faafff1111aa11
  16         #initial_regs[2] = 31
  17         initial_regs[2] = 11
  18         # set expected (intregs, pc, [crregs], so, ov, ca)
  19         e = ExpectedState(initial_regs, 4)
  20         e.intregs[3] = 0x8800
  21         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  22
  23     def case_srw_1(self):
  24         lst = ["sraw 3, 1, 2"]
  25         initial_regs = [0] * 32
  26         initial_regs[1] = 0x12345678
  27         initial_regs[2] = 8
  28         e = ExpectedState(initial_regs, 4)
  29         e.intregs[3] = 0x123456
  30         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  31
  32     def case_srw_2(self):
  33         lst = ["sraw 3, 1, 2"]
  34         initial_regs = [0] * 32
  35         initial_regs[1] = 0x82345678  # test the carry
  36         initial_regs[2] = 8
  37         e = ExpectedState(initial_regs, 4, ca=3)
  38         e.intregs[3] = 0xffffffffff823456
  39         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  40
  41     def case_sld_rb_too_big(self):
  42         lst = ["sld 3, 1, 4"]
  43         initial_regs = [0] * 32
  44         initial_regs[1] = 0xffffffffffffffff
  45         initial_regs[4] = 64  # too big, output should be zero
  46         e = ExpectedState(initial_regs, 4)
  47         e.intregs[3] = 0x0
  48         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  49
  50     def case_sld_rb_is_zero(self):
  51         lst = ["sld 3, 1, 4"]
  52         initial_regs = [0] * 32
  53         initial_regs[1] = 0x8000000000000000
  54         initial_regs[4] = 0  # no shift; output should equal input
  55         e = ExpectedState(initial_regs, 4)
  56         e.intregs[3] = initial_regs[1]
  57         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  58
  59     def case_shift_once(self):
  60         lst = ["slw 3, 1, 4",
  61                "slw 3, 1, 2"]
  62         initial_regs = [0] * 32
  63         initial_regs[1] = 0x80000000
  64         initial_regs[2] = 0x40
  65         initial_regs[4] = 0x00
  66         e = ExpectedState(initial_regs, 8)
  67         e.intregs[3] = 0x80000000
  68         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  69
  70     def case_rlwinm_1(self):
  71         lst = ["rlwinm 3, 1, 1, 31, 31"]  # Extracts sign bit
  72         initial_regs = [0] * 32
  73         initial_regs[1] = 0x8fffffff
  74         e = ExpectedState(initial_regs, 4)
  75         e.intregs[3] = 0x1
  76         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  77
  78     def case_rlwinm_2(self):
  79         lst = ["rlwinm 3, 1, 1, 0, 30"]
  80         initial_regs = [0] * 32
  81         initial_regs[1] = 0xf1110001
  82         e = ExpectedState(initial_regs, 4)
  83         e.intregs[3] = 0xe2220002
  84         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  85
  86     def case_rlwinm_3(self):
  87         lst = ["rlwinm 3, 1, 0, 16, 31"]  # Clear high-order 16 bits
  88         initial_regs = [0] * 32
  89         initial_regs[1] = 0xebeb1888
  90         e = ExpectedState(initial_regs, 4)
  91         e.intregs[3] = 0x1888
  92         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
  93
  94     def case_rlwimi_1(self):
  95         lst = ["rlwimi 3, 1, 31, 0, 0"]
  96         initial_regs = [0] * 32
  97         initial_regs[1] = 0x1
  98         initial_regs[3] = 0x7fffffff
  99         e = ExpectedState(initial_regs, 4)
 100         e.intregs[3] = 0xffffffff
 101         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 102
 103     def case_rlwimi_2(self):
 104         lst = ["rlwimi 3, 1, 16, 8, 15"]
 105         initial_regs = [0] * 32
 106         initial_regs[1] = 0xcc
 107         initial_regs[3] = 0x7f00ffff
 108         e = ExpectedState(initial_regs, 4)
 109         e.intregs[3] = 0x7fccffff
 110         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 111
 112     def case_rlwnm_1(self):
 113         lst = ["rlwnm 3, 1, 2, 0, 31"]
 114         initial_regs = [0] * 32
 115         initial_regs[1] = 0x111
 116         initial_regs[2] = 1
 117         e = ExpectedState(initial_regs, 4)
 118         e.intregs[3] = 0x222
 119         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 120
 121     def case_rlwnm_2(self):
 122         lst = ["rlwnm 3, 1, 2, 8, 11"]
 123         initial_regs = [0] * 32
 124         initial_regs[1] = 0xfebaacda
 125         initial_regs[2] = 16
 126         e = ExpectedState(initial_regs, 4)
 127         e.intregs[3] = 0xd00000
 128         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 129
 130     def case_rldic_1(self):
 131         lst = ["rldic 3, 1, 8, 31"]  # Simple rotate and clear
 132         initial_regs = [0] * 32
 133         initial_regs[1] = 0x0100ffff00000111
 134         e = ExpectedState(initial_regs, 4)
 135         e.intregs[3] = 0x11100
 136         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 137
 138     def case_rldic_2(self):
 139         lst = ["rldic 3, 1, 0, 51"]  # No rotate and clear
 140         initial_regs = [0] * 32
 141         initial_regs[1] = 0x0100ffff00000fff
 142         e = ExpectedState(initial_regs, 4)
 143         e.intregs[3] = 0xfff
 144         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 145
 146     def case_rldicl_1(self):
 147         lst = ["rldicl 3, 1, 8, 44"]  # Simple rotate with left clear
 148         initial_regs = [0] * 32
 149         initial_regs[1] = 0x0100ffff00000111
 150         e = ExpectedState(initial_regs, 4)
 151         e.intregs[3] = 0x11101
 152         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 153
 154     def case_rldicl_2(self):
 155         lst = ["rldicl 3, 1, 32, 47"]  # Rotate right and clear
 156         initial_regs = [0] * 32
 157         initial_regs[1] = 0x1000dead0000111c
 158         e = ExpectedState(initial_regs, 4)
 159         e.intregs[3] = 0xdead
 160         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 161
 162     def case_rldicr_1(self):
 163         lst = ["rldicr 3, 1, 16, 15"]  # Simple rotate with right clear
 164         initial_regs = [0] * 32
 165         initial_regs[1] = 0x0100ffffe0000111
 166         e = ExpectedState(initial_regs, 4)
 167         e.intregs[3] = 0xffff000000000000
 168         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 169
 170     def case_rldicr_2(self):
 171         lst = ["rldicr 3, 1, 32, 32"]  # Rotate right and clear
 172         initial_regs = [0] * 32
 173         initial_regs[1] = 0x1000caef0000dead
 174         e = ExpectedState(initial_regs, 4)
 175         e.intregs[3] = 0xdead00000000
 176         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 177
 178     def case_regression_extswsli_1(self):
 179         lst = [f"extswsli 3, 1, 31"]
 180         initial_regs = [0] * 32
 181         initial_regs[1] = 0x5678
 182         e = ExpectedState(initial_regs, 4)
 183         e.intregs[3] = 0x2b3c00000000
 184         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 185
 186     def case_regression_extswsli_2(self):
 187         lst = [f"extswsli 3, 1, 7"]
 188         initial_regs = [0] * 32
 189         initial_regs[1] = 0x3ffffd7377f19fdd
 190         e = ExpectedState(initial_regs, 4)
 191         e.intregs[3] = 0x3bf8cfee80
 192         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 193
 194     def case_regression_extswsli_3(self):
 195         lst = [f"extswsli 3, 1, 0"]
 196         initial_regs = [0] * 32
 197         initial_regs[1] = 0x0000010180122900
 198         e = ExpectedState(initial_regs, 4)
 199         e.intregs[3] = 0xffffffff80122900
 200         self.add_case(Program(lst, bigendian), initial_regs, expected=e)