src/openpower/test/trap/trap_cases.py

   1 from openpower.simulator.program import Program
   2 from openpower.endian import bigendian
   3 from openpower.consts import MSR
   4
   5 from openpower.test.common import TestAccumulatorBase
   6 import random
   7
   8
   9 class TrapTestCase(TestAccumulatorBase):
  10
  11     def case_0_hrfid(self):
  12         lst = ["hrfid"]
  13         initial_regs = [0] * 32
  14         initial_regs[1] = 1
  15         initial_sprs = {'HSRR0': 0x12345678, 'HSRR1': 0x5678}
  16         self.add_case(Program(lst, bigendian),
  17                       initial_regs, initial_sprs)
  18
  19     def case_1_rfid(self):
  20         lst = ["rfid"]
  21         initial_regs = [0] * 32
  22         initial_regs[1] = 1
  23         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0x5678}
  24         self.add_case(Program(lst, bigendian),
  25                       initial_regs, initial_sprs)
  26
  27     def case_2_rfid(self):
  28         lst = ["rfid"]
  29         initial_regs = [0] * 32
  30         initial_regs[1] = 1
  31         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0xb000000000001033}
  32         self.add_case(Program(lst, bigendian),
  33                       initial_regs, initial_sprs,
  34                                     initial_msr=0xa000000000000003)
  35
  36     def case_0_trap_eq_imm(self):
  37         insns = ["twi", "tdi"]
  38         for i in range(2):
  39             choice = random.choice(insns)
  40             lst = [f"{choice} 4, 1, %d" % i]  # TO=4: trap equal
  41             initial_regs = [0] * 32
  42             initial_regs[1] = 1
  43             self.add_case(Program(lst, bigendian), initial_regs)
  44
  45     def case_0_trap_eq(self):
  46         insns = ["tw", "td"]
  47         for i in range(2):
  48             choice = insns[i]
  49             lst = [f"{choice} 4, 1, 2"]  # TO=4: trap equal
  50             initial_regs = [0] * 32
  51             initial_regs[1] = 1
  52             initial_regs[2] = 1
  53             self.add_case(Program(lst, bigendian), initial_regs)
  54
  55     def case_3_mtmsr_0(self):
  56         lst = ["mtmsr 1,0"]
  57         initial_regs = [0] * 32
  58         initial_regs[1] = 0xffffffffffffffff
  59         self.add_case(Program(lst, bigendian), initial_regs)
  60
  61     def case_3_mtmsr_1(self):
  62         lst = ["mtmsr 1,1"]
  63         initial_regs = [0] * 32
  64         initial_regs[1] = 0xffffffffffffffff
  65         self.add_case(Program(lst, bigendian), initial_regs)
  66
  67     def case_4_mtmsrd_0_linux(self):
  68         lst = ["mtmsrd 1,0"]
  69         initial_regs = [0] * 32
  70         initial_regs[1] = 0xb000000000001033
  71         self.add_case(Program(lst, bigendian), initial_regs,
  72                                     initial_msr=0xa000000000000003)
  73
  74     def case_4_mtmsrd_0(self):
  75         lst = ["mtmsrd 1,0"]
  76         initial_regs = [0] * 32
  77         initial_regs[1] = 0xffffffffffffffff
  78         self.add_case(Program(lst, bigendian), initial_regs)
  79
  80     def case_5_mtmsrd_1(self):
  81         lst = ["mtmsrd 1,1"]
  82         initial_regs = [0] * 32
  83         initial_regs[1] = 0xffffffffffffffff
  84         self.add_case(Program(lst, bigendian), initial_regs)
  85
  86     def case_6_mtmsr_priv_0(self):
  87         lst = ["mtmsr 1,0"]
  88         initial_regs = [0] * 32
  89         initial_regs[1] = 0xffffffffffffffff
  90         msr = 1 << MSR.PR  # set in "problem state"
  91         self.add_case(Program(lst, bigendian), initial_regs,
  92                       initial_msr=msr)
  93
  94     def case_7_rfid_priv_0(self):
  95         lst = ["rfid"]
  96         initial_regs = [0] * 32
  97         initial_regs[1] = 1
  98         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0x5678}
  99         msr = 1 << MSR.PR  # set in "problem state"
 100         self.add_case(Program(lst, bigendian),
 101                       initial_regs, initial_sprs,
 102                       initial_msr=msr)
 103
 104     def case_8_mfmsr(self):
 105         lst = ["mfmsr 1"]
 106         initial_regs = [0] * 32
 107         msr = (~(1 << MSR.PR)) & 0xffffffffffffffff
 108         self.add_case(Program(lst, bigendian), initial_regs,
 109                       initial_msr=msr)
 110
 111     def case_9_mfmsr_priv(self):
 112         lst = ["mfmsr 1"]
 113         initial_regs = [0] * 32
 114         msr = 1 << MSR.PR  # set in "problem state"
 115         self.add_case(Program(lst, bigendian), initial_regs,
 116                       initial_msr=msr)
 117
 118     def case_999_illegal(self):
 119         # ok, um this is a bit of a cheat: use an instruction we know
 120         # is not implemented by either ISACaller or the core
 121         lst = ["tbegin.",
 122                "mtmsr 1,1"]  # should not get executed
 123         initial_regs = [0] * 32
 124         self.add_case(Program(lst, bigendian), initial_regs)
 125