src/openpower/test/trap/trap_cases.py

   1 from openpower.simulator.program import Program
   2 from openpower.endian import bigendian
   3 from openpower.consts import MSR
   4 from openpower.test.state import ExpectedState
   5
   6 from openpower.test.common import TestAccumulatorBase
   7 import random
   8
   9
  10 class TrapTestCase(TestAccumulatorBase):
  11
  12     def case_0_hrfid(self):
  13         lst = ["hrfid"]
  14         initial_regs = [0] * 32
  15         initial_regs[1] = 1
  16         initial_sprs = {'HSRR0': 0x12345678, 'HSRR1': 0x5678}
  17         self.add_case(Program(lst, bigendian),
  18                       initial_regs, initial_sprs)
  19
  20     def case_1_rfid(self):
  21         lst = ["rfid"]
  22         initial_regs = [0] * 32
  23         initial_regs[1] = 1
  24         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0x5678}
  25         self.add_case(Program(lst, bigendian),
  26                       initial_regs, initial_sprs)
  27
  28     def case_2_rfid(self):
  29         lst = ["rfid"]
  30         initial_regs = [0] * 32
  31         initial_regs[1] = 1
  32         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0xb000000000001033}
  33         e = ExpectedState(pc=0x700)
  34         e.intregs[1] = 1
  35         e.msr = 0xb000000000001033 # TODO, not actually checked
  36         self.add_case(Program(lst, bigendian),
  37                       initial_regs, initial_sprs,
  38                                     initial_msr=0xa000000000000003,
  39                                     expected=e)
  40
  41     def case_0_trap_eq_imm(self):
  42         insns = ["twi", "tdi"]
  43         for i in range(2):
  44             choice = random.choice(insns)
  45             lst = [f"{choice} 4, 1, %d" % i]  # TO=4: trap equal
  46             initial_regs = [0] * 32
  47             initial_regs[1] = 1
  48             self.add_case(Program(lst, bigendian), initial_regs)
  49
  50     def case_0_trap_eq(self):
  51         insns = ["tw", "td"]
  52         for i in range(2):
  53             choice = insns[i]
  54             lst = [f"{choice} 4, 1, 2"]  # TO=4: trap equal
  55             initial_regs = [0] * 32
  56             initial_regs[1] = 1
  57             initial_regs[2] = 1
  58             self.add_case(Program(lst, bigendian), initial_regs)
  59
  60     def case_3_mtmsr_0(self):
  61         lst = ["mtmsr 1,0"]
  62         initial_regs = [0] * 32
  63         initial_regs[1] = 0xffffffffffffffff
  64         self.add_case(Program(lst, bigendian), initial_regs)
  65
  66     def case_3_mtmsr_1(self):
  67         lst = ["mtmsr 1,1"]
  68         initial_regs = [0] * 32
  69         initial_regs[1] = 0xffffffffffffffff
  70         self.add_case(Program(lst, bigendian), initial_regs)
  71
  72     def case_4_mtmsrd_0_linux(self):
  73         lst = ["mtmsrd 1,0"]
  74         initial_regs = [0] * 32
  75         initial_regs[1] = 0xb000000000001033
  76         self.add_case(Program(lst, bigendian), initial_regs,
  77                                     initial_msr=0xa000000000000003)
  78
  79     def case_4_mtmsrd_0(self):
  80         lst = ["mtmsrd 1,0"]
  81         initial_regs = [0] * 32
  82         initial_regs[1] = 0xffffffffffffffff
  83         self.add_case(Program(lst, bigendian), initial_regs)
  84
  85     def case_5_mtmsrd_1(self):
  86         lst = ["mtmsrd 1,1"]
  87         initial_regs = [0] * 32
  88         initial_regs[1] = 0xffffffffffffffff
  89         self.add_case(Program(lst, bigendian), initial_regs)
  90
  91     def case_6_mtmsr_priv_0(self):
  92         lst = ["mtmsr 1,0"]
  93         initial_regs = [0] * 32
  94         initial_regs[1] = 0xffffffffffffffff
  95         msr = 1 << MSR.PR  # set in "problem state"
  96         self.add_case(Program(lst, bigendian), initial_regs,
  97                       initial_msr=msr)
  98
  99     def case_7_rfid_priv_0(self):
 100         lst = ["rfid"]
 101         initial_regs = [0] * 32
 102         initial_regs[1] = 1
 103         initial_sprs = {'SRR0': 0x12345678, 'SRR1': 0x5678}
 104         msr = 1 << MSR.PR  # set in "problem state"
 105         self.add_case(Program(lst, bigendian),
 106                       initial_regs, initial_sprs,
 107                       initial_msr=msr)
 108
 109     def case_8_mfmsr(self):
 110         lst = ["mfmsr 1"]
 111         initial_regs = [0] * 32
 112         msr = (~(1 << MSR.PR)) & 0xffffffffffffffff
 113         self.add_case(Program(lst, bigendian), initial_regs,
 114                       initial_msr=msr)
 115
 116     def case_9_mfmsr_priv(self):
 117         lst = ["mfmsr 1"]
 118         initial_regs = [0] * 32
 119         msr = 1 << MSR.PR  # set in "problem state"
 120         self.add_case(Program(lst, bigendian), initial_regs,
 121                       initial_msr=msr)
 122
 123     def case_999_illegal(self):
 124         # ok, um this is a bit of a cheat: use an instruction we know
 125         # is not implemented by either ISACaller or the core
 126         lst = ["tbegin.",
 127                "mtmsr 1,1"]  # should not get executed
 128         initial_regs = [0] * 32
 129         self.add_case(Program(lst, bigendian), initial_regs)
 130