src/spec/pinfunctions.py

   1 #!/usr/bin/env python
   2
   3 """ define functions here, with their pin names and the pin type.
   4
   5     each function returns a pair of lists
   6     (or objects with a __getitem__ function)
   7
   8     the first list (or object) contains pin name plus type specifications.
   9
  10     the type is:
  11
  12     * "-" for an input pin,
  13     * "+" for an output pin,
  14     * "*" for an in/out pin
  15
  16     each function is then added to the pinspec tuple, below, as a ("NAME",
  17     function) entry.
  18
  19     different functions may be added multiple times under the same NAME,
  20     so that complex (or large) functions can be split into one or more
  21     groups (and placed on different pinbanks).
  22
  23     eint, pwm and gpio are slightly odd in that instead of a fixed list
  24     an object is returned with a __getitem__ function that accepts a
  25     slice object.  in this way the actual generation of the pin name
  26     is delayed until it is known precisely how many pins are to be
  27     generated, and that's not known immediately (or it would be if
  28     every single one of the functions below had a start and end parameter
  29     added).  see spec.interfaces.PinGen class slice on pingroup
  30
  31     the second list is the names of pins that are part of an inout bus.
  32     this list of pins (a ganged group) will need to be changed under
  33     the control of the function, as a group.  for example: sdmmc's
  34     D0-D3 pins are in-out, they all change from input to output at
  35     the same time under the control of the function, therefore there's
  36     no point having multiple in-out switch/control wires, as the
  37     sdmmc is never going to do anything other than switch this entire
  38     bank all at once.  so in this particular example, sdmmc returns:
  39
  40     (['CMD+', 'CLK+', 'D0*', 'D1*', 'D2*', 'D3*'] # pin names
  41      ['D0*', 'D1*', 'D2*', 'D3*'])                # ganged bus names
  42
  43     addition:
  44
  45     3rd item in list gives the name of the clock.
  46 """
  47
  48
  49 def i2s(suffix, bank):
  50     return (['MCK+', 'BCK+', 'LRCK+', 'DI-', 'DO+'],
  51             [], "MCK")
  52
  53
  54 # XXX TODO: correct these.  this is a stub for now
  55 # https://bugs.libre-soc.org/show_bug.cgi?id=303
  56 def lpc(suffix, bank, pincount=4):
  57     lpcpins = ['CMD*', 'CLK+']
  58     inout = []
  59     for i in range(pincount):
  60         pname = "D%d*" % i
  61         lpcpins.append(pname)
  62         inout.append(pname)
  63     return (lpcpins, inout, 'CLK')
  64
  65
  66 def emmc(suffix, bank, pincount=8):
  67     emmcpins = ['CMD*', 'CLK+']
  68     inout = []
  69     for i in range(pincount):
  70         pname = "D%d*" % i
  71         emmcpins.append(pname)
  72         inout.append(pname)
  73     return (emmcpins, inout, 'CLK')
  74
  75
  76 def sdmmc(suffix, bank):
  77     return emmc(suffix, bank, pincount=4)
  78
  79
  80 def nspi(suffix, bank, iosize, masteronly=True):
  81     if masteronly:
  82         qpins = ['CK+', 'NSS+']
  83     else:
  84         qpins = ['CK*', 'NSS*']
  85     inout = []
  86     if iosize == 2:
  87         qpins += ['MOSI+', 'MISO-']
  88     else:
  89         for i in range(iosize):
  90             pname = "IO%d*" % i
  91             qpins.append(pname)
  92             inout.append(pname)
  93     return (qpins, inout, 'CK')
  94
  95
  96 def mspi(suffix, bank):
  97     return nspi(suffix, bank, 2, masteronly=True)
  98
  99
 100 def mquadspi(suffix, bank):
 101     return nspi(suffix, bank, 4, masteronly=True)
 102
 103
 104 def spi(suffix, bank):
 105     return nspi(suffix, bank, 2)
 106
 107
 108 def quadspi(suffix, bank):
 109     return nspi(suffix, bank, 4)
 110
 111
 112 def i2c(suffix, bank):
 113     """bi-directional (reversible, master-slave) I2C
 114     """
 115     return (['SDA*', 'SCL*'], [], 'SCL')
 116
 117
 118 def mi2c(suffix, bank):
 119     """master-only I2C (clock is output only)
 120     """
 121     return (['SDA*', 'SCL+'], [], 'SCL')
 122
 123
 124 def jtag(suffix, bank):
 125     return (['TMS-', 'TDI-', 'TDO+', 'TCK+'], [], 'TCK')
 126
 127
 128 def uart(suffix, bank):
 129     return (['TX+', 'RX-'], [], None)
 130
 131
 132 def ulpi(suffix, bank):
 133     ulpipins = ['CK+', 'DIR+', 'STP+', 'NXT+']
 134     for i in range(8):
 135         ulpipins.append('D%d*' % i)
 136     return (ulpipins, [], 'CK')
 137
 138
 139 def uartfull(suffix, bank):
 140     return (['TX+', 'RX-', 'CTS-', 'RTS+'], [], None)
 141
 142
 143 def rgbttl(suffix, bank):
 144     ttlpins = ['CK+', 'DE+', 'HS+', 'VS+']
 145     for i in range(24):
 146         ttlpins.append("OUT%d+" % i)
 147     return (ttlpins, [], 'CK')
 148
 149
 150 def rgmii(suffix, bank):
 151     buspins = []
 152     for i in range(4):
 153         buspins.append("ERXD%d-" % i)
 154     for i in range(4):
 155         buspins.append("ETXD%d+" % i)
 156     buspins += ['ERXCK-', 'ERXERR-', 'ERXDV-',
 157                 'EMDC+', 'EMDIO*',
 158                 'ETXEN+', 'ETXCK+', 'ECRS-',
 159                 'ECOL+', 'ETXERR+']
 160     return (buspins, [], ['ERXCK', 'ETXCK'])
 161
 162
 163 def flexbus1(suffix, bank):
 164     buspins = []
 165     inout = []
 166     for i in range(8):
 167         pname = "AD%d*" % i
 168         buspins.append(pname)
 169         inout.append(pname)
 170     for i in range(2):
 171         buspins.append("CS%d+" % i)
 172     buspins += ['ALE+', 'OE+', 'RW+', 'TA-',
 173                 # 'TS+',  commented out for now, mirrors ALE, for mux'd mode
 174                 'TBST+',
 175                 'TSIZ0+', 'TSIZ1+']
 176     for i in range(4):
 177         buspins.append("BWE%d+" % i)
 178     for i in range(2, 6):
 179         buspins.append("CS%d+" % i)
 180     return (buspins, inout, None)
 181
 182
 183 def flexbus2(suffix, bank):
 184     buspins = []
 185     for i in range(8, 32):
 186         buspins.append("AD%d*" % i)
 187     return (buspins, buspins, None)
 188
 189
 190 def sdram1(suffix, bank, n_adr=10):
 191     buspins = []
 192     inout = []
 193     for i in range(1):
 194         pname = "DQM%d+" % i
 195         buspins.append(pname)
 196     for i in range(8):
 197         pname = "D%d*" % i
 198         buspins.append(pname)
 199         inout.append(pname)
 200     for i in range(2):
 201         buspins.append("BA%d+" % i)
 202     for i in range(n_adr):
 203         buspins.append("AD%d+" % i)
 204     buspins += ['CLK+', 'CKE+', 'RASn+', 'CASn+', 'WEn+',
 205                 'CSn0+']
 206     return (buspins, inout, 'CLK')
 207
 208
 209 def sdram2(suffix, bank):
 210     buspins = []
 211     inout = []
 212     for i in range(10, 13):
 213         buspins.append("AD%d+" % i)
 214     for i in range(1, 2):
 215         pname = "DQM%d+" % i
 216         buspins.append(pname)
 217     for i in range(8, 16):
 218         pname = "D%d*" % i
 219         buspins.append(pname)
 220         inout.append(pname)
 221     return (buspins, inout, None)
 222
 223
 224 def sdram3(suffix, bank):
 225     buspins = []
 226     inout = []
 227     for i in range(1, 6):
 228         buspins.append("CSn%d+" % i)
 229     for i in range(13, 14):
 230         buspins.append("AD%d+" % i)
 231     for i in range(1, 4):
 232         pname = "DQM%d+" % i
 233     for i in range(8, 32):
 234         pname = "D%d*" % i
 235         buspins.append(pname)
 236         inout.append(pname)
 237     return (buspins, inout, None)
 238
 239
 240 def mcu8080(suffix, bank):
 241     buspins = []
 242     inout = []
 243     for i in range(8):
 244         pname = "D%d*" % i
 245         buspins.append(pname)
 246         inout.append(pname)
 247     for i in range(8):
 248         buspins.append("AD%d+" % (i + 8))
 249     for i in range(6):
 250         buspins.append("CS%d+" % i)
 251     for i in range(2):
 252         buspins.append("NRB%d+" % i)
 253     buspins += ['CD+', 'RD+', 'WR+', 'CLE+', 'ALE+',
 254                 'RST+']
 255     return (buspins, inout, None)
 256
 257
 258 class RangePin(object):
 259     def __init__(self, suffix, prefix=None):
 260         self.suffix = suffix
 261         self.prefix = prefix or ''
 262
 263     def __getitem__(self, s):
 264         res = []
 265         for idx in range(s.start or 0, s.stop or -1, s.step or 1):
 266             res.append("%s%d%s" % (self.prefix, idx, self.suffix))
 267         return res
 268
 269
 270 def eint(suffix, bank):
 271     return (RangePin("-"), [], None)
 272
 273
 274 def pwm(suffix, bank):
 275     return (RangePin("+"), [], None)
 276
 277
 278 def gpio(suffix, bank):
 279     return (("GPIO%s" % bank, RangePin(prefix=bank, suffix="*")), [], None)
 280
 281 def vss(suffix, bank):
 282     return (RangePin("-"), [], None)
 283
 284 def vdd(suffix, bank):
 285     return (RangePin("-"), [], None)
 286
 287 def sys(suffix, bank):
 288     return (['RST-',                       # reset line
 289              'PLLCLK-',                       # incoming clock (to PLL)
 290              'PLLSELA0-', 'PLLSELA1-',     # PLL divider-selector
 291              'PLLTESTOUT+',                # divided-output (for testing)
 292              'PLLVCOUT+',                  # PLL VCO analog out (for testing)
 293              ], [], 'CLK')
 294
 295 # list functions by name here
 296
 297 pinspec = (('IIS', i2s),
 298            ('LPC', lpc),
 299            ('EMMC', emmc),
 300            ('SD', sdmmc),
 301            ('MSPI', mspi),
 302            ('MQSPI', mquadspi),
 303            ('SPI', spi),
 304            ('QSPI', quadspi),
 305            ('TWI', i2c),
 306            ('MTWI', mi2c),
 307            ('JTAG', jtag),
 308            ('UART', uart),
 309            ('QUART', uartfull),
 310            ('LCD', rgbttl),
 311            ('ULPI', ulpi),
 312            ('RG', rgmii),
 313            ('FB', flexbus1),
 314            ('FB', flexbus2),
 315            ('SDR', sdram1),
 316            ('SDR', sdram2),
 317            ('SDR', sdram3),
 318            ('VSS', vss),
 319            ('VDD', vdd),
 320            ('SYS', sys),
 321            ('EINT', eint),
 322            ('PWM', pwm),
 323            ('GPIO', gpio),
 324            )