isa/macros/scalar/test_macros.h

   1 #ifndef __TEST_MACROS_SCALAR_H
   2 #define __TEST_MACROS_SCALAR_H
   3
   4
   5 #-----------------------------------------------------------------------
   6 # Helper macros
   7 #-----------------------------------------------------------------------
   8
   9 #define TEST_CASE( testnum, testreg, correctval, code... ) \
  10 test_ ## testnum: \
  11     code; \
  12     li  x29, correctval; \
  13     li  x28, testnum; \
  14     bne testreg, x29, fail;
  15
  16 #define TEST_CASE_JUMP( testnum, testreg, correctval, code... ) \
  17 test_ ## testnum: \
  18     code; \
  19     li  x29, correctval; \
  20     li  x28, testnum; \
  21     beq testreg, x29, pass_ ## testnum; \
  22     j fail; \
  23 pass_ ## testnum: \
  24
  25 # We use a macro hack to simpify code generation for various numbers
  26 # of bubble cycles.
  27
  28 #define TEST_INSERT_NOPS_0
  29 #define TEST_INSERT_NOPS_1  nop; TEST_INSERT_NOPS_0
  30 #define TEST_INSERT_NOPS_2  nop; TEST_INSERT_NOPS_1
  31 #define TEST_INSERT_NOPS_3  nop; TEST_INSERT_NOPS_2
  32 #define TEST_INSERT_NOPS_4  nop; TEST_INSERT_NOPS_3
  33 #define TEST_INSERT_NOPS_5  nop; TEST_INSERT_NOPS_4
  34 #define TEST_INSERT_NOPS_6  nop; TEST_INSERT_NOPS_5
  35 #define TEST_INSERT_NOPS_7  nop; TEST_INSERT_NOPS_6
  36 #define TEST_INSERT_NOPS_8  nop; TEST_INSERT_NOPS_7
  37 #define TEST_INSERT_NOPS_9  nop; TEST_INSERT_NOPS_8
  38 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
  39
  40
  41 #-----------------------------------------------------------------------
  42 # RV64UI MACROS
  43 #-----------------------------------------------------------------------
  44
  45 #-----------------------------------------------------------------------
  46 # Tests for instructions with immediate operand
  47 #-----------------------------------------------------------------------
  48
  49 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
  50     TEST_CASE( testnum, x3, result, \
  51       li  x1, val1; \
  52       inst x3, x1, imm; \
  53     )
  54
  55 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
  56     TEST_CASE( testnum, x1, result, \
  57       li  x1, val1; \
  58       inst x1, x1, imm; \
  59     )
  60
  61 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
  62     TEST_CASE( testnum, x6, result, \
  63       li  x4, 0; \
  64 1:    li  x1, val1; \
  65       inst x3, x1, imm; \
  66       TEST_INSERT_NOPS_ ## nop_cycles \
  67       addi  x6, x3, 0; \
  68       addi  x4, x4, 1; \
  69       li  x5, 2; \
  70       bne x4, x5, 1b \
  71     )
  72
  73 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
  74     TEST_CASE( testnum, x3, result, \
  75       li  x4, 0; \
  76 1:    li  x1, val1; \
  77       TEST_INSERT_NOPS_ ## nop_cycles \
  78       inst x3, x1, imm; \
  79       addi  x4, x4, 1; \
  80       li  x5, 2; \
  81       bne x4, x5, 1b \
  82     )
  83
  84 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
  85     TEST_CASE( testnum, x1, result, \
  86       inst x1, x0, imm; \
  87     )
  88
  89 #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
  90     TEST_CASE( testnum, x0, 0, \
  91       li  x1, val1; \
  92       inst x0, x1, imm; \
  93     )
  94
  95 #-----------------------------------------------------------------------
  96 # Tests for vector config instructions
  97 #-----------------------------------------------------------------------
  98
  99 #define TEST_VVCFGIVL( testnum, nxpr, nfpr, bank, vl, result ) \
 100     TEST_CASE_JUMP( testnum, x1, result, \
 101       li x2, bank; \
 102       mtpcr x2, cr18; \
 103       li x1, vl; \
 104       vvcfgivl x1,x1,nxpr,nfpr; \
 105     )
 106
 107 #define TEST_VVCFG( testnum, nxpr, nfpr, bank, vl, result ) \
 108     TEST_CASE_JUMP( testnum, x1, result, \
 109       li x2, bank; \
 110       mtpcr x2, cr18; \
 111       li x1, nxpr; \
 112       li x2, nfpr; \
 113       vvcfg x1,x2; \
 114       li x1, vl; \
 115       vsetvl x1,x1; \
 116     )
 117
 118 #define TEST_VSETVL( testnum, nxpr, nfpr, bank, vl, result ) \
 119     TEST_CASE_JUMP( testnum, x1, result, \
 120       li x2, bank; \
 121       mtpcr x2, cr18; \
 122       vvcfgivl x0,x0,nxpr,nfpr; \
 123       li x1, vl; \
 124       vsetvl x1, x1; \
 125     )
 126
 127 #-----------------------------------------------------------------------
 128 # Tests for an instruction with register operands
 129 #-----------------------------------------------------------------------
 130
 131 #define TEST_R_OP( testnum, inst, result, val1 ) \
 132     TEST_CASE( testnum, x3, result, \
 133       li  x1, val1; \
 134       inst x3, x1; \
 135     )
 136
 137 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
 138     TEST_CASE( testnum, x1, result, \
 139       li  x1, val1; \
 140       inst x1, x1; \
 141     )
 142
 143 #define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
 144     TEST_CASE( testnum, x6, result, \
 145       li  x4, 0; \
 146 1:    li  x1, val1; \
 147       inst x3, x1; \
 148       TEST_INSERT_NOPS_ ## nop_cycles \
 149       addi  x6, x3, 0; \
 150       addi  x4, x4, 1; \
 151       li  x5, 2; \
 152       bne x4, x5, 1b \
 153     )
 154
 155 #-----------------------------------------------------------------------
 156 # Tests for an instruction with register-register operands
 157 #-----------------------------------------------------------------------
 158
 159 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
 160     TEST_CASE( testnum, x3, result, \
 161       li  x1, val1; \
 162       li  x2, val2; \
 163       inst x3, x1, x2; \
 164     )
 165
 166 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
 167     TEST_CASE( testnum, x1, result, \
 168       li  x1, val1; \
 169       li  x2, val2; \
 170       inst x1, x1, x2; \
 171     )
 172
 173 #define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
 174     TEST_CASE( testnum, x2, result, \
 175       li  x1, val1; \
 176       li  x2, val2; \
 177       inst x2, x1, x2; \
 178     )
 179
 180 #define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
 181     TEST_CASE( testnum, x1, result, \
 182       li  x1, val1; \
 183       inst x1, x1, x1; \
 184     )
 185
 186 #define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
 187     TEST_CASE( testnum, x6, result, \
 188       li  x4, 0; \
 189 1:    li  x1, val1; \
 190       li  x2, val2; \
 191       inst x3, x1, x2; \
 192       TEST_INSERT_NOPS_ ## nop_cycles \
 193       addi  x6, x3, 0; \
 194       addi  x4, x4, 1; \
 195       li  x5, 2; \
 196       bne x4, x5, 1b \
 197     )
 198
 199 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
 200     TEST_CASE( testnum, x3, result, \
 201       li  x4, 0; \
 202 1:    li  x1, val1; \
 203       TEST_INSERT_NOPS_ ## src1_nops \
 204       li  x2, val2; \
 205       TEST_INSERT_NOPS_ ## src2_nops \
 206       inst x3, x1, x2; \
 207       addi  x4, x4, 1; \
 208       li  x5, 2; \
 209       bne x4, x5, 1b \
 210     )
 211
 212 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
 213     TEST_CASE( testnum, x3, result, \
 214       li  x4, 0; \
 215 1:    li  x2, val2; \
 216       TEST_INSERT_NOPS_ ## src1_nops \
 217       li  x1, val1; \
 218       TEST_INSERT_NOPS_ ## src2_nops \
 219       inst x3, x1, x2; \
 220       addi  x4, x4, 1; \
 221       li  x5, 2; \
 222       bne x4, x5, 1b \
 223     )
 224
 225 #define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
 226     TEST_CASE( testnum, x2, result, \
 227       li x1, val; \
 228       inst x2, x0, x1; \
 229     )
 230
 231 #define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
 232     TEST_CASE( testnum, x2, result, \
 233       li x1, val; \
 234       inst x2, x1, x0; \
 235     )
 236
 237 #define TEST_RR_ZEROSRC12( testnum, inst, result ) \
 238     TEST_CASE( testnum, x1, result, \
 239       inst x1, x0, x0; \
 240     )
 241
 242 #define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
 243     TEST_CASE( testnum, x0, 0, \
 244       li x1, val1; \
 245       li x2, val2; \
 246       inst x0, x1, x2; \
 247     )
 248
 249 #-----------------------------------------------------------------------
 250 # Test memory instructions
 251 #-----------------------------------------------------------------------
 252
 253 #define TEST_LD_OP( testnum, inst, result, offset, base ) \
 254     TEST_CASE( testnum, x3, result, \
 255       la  x1, base; \
 256       inst x3, offset(x1); \
 257     )
 258
 259 #define TEST_ST_OP( testnum, load_inst, store_inst, result, offset, base ) \
 260     TEST_CASE( testnum, x3, result, \
 261       la  x1, base; \
 262       li  x2, result; \
 263       store_inst x2, offset(x1); \
 264       load_inst x3, offset(x1); \
 265     )
 266
 267 #define TEST_LD_DEST_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
 268 test_ ## testnum: \
 269     li  x28, testnum; \
 270     li  x4, 0; \
 271 1:  la  x1, base; \
 272     inst x3, offset(x1); \
 273     TEST_INSERT_NOPS_ ## nop_cycles \
 274     addi  x6, x3, 0; \
 275     li  x29, result; \
 276     bne x6, x29, fail; \
 277     addi  x4, x4, 1; \
 278     li  x5, 2; \
 279     bne x4, x5, 1b; \
 280
 281 #define TEST_LD_SRC1_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
 282 test_ ## testnum: \
 283     li  x28, testnum; \
 284     li  x4, 0; \
 285 1:  la  x1, base; \
 286     TEST_INSERT_NOPS_ ## nop_cycles \
 287     inst x3, offset(x1); \
 288     li  x29, result; \
 289     bne x3, x29, fail; \
 290     addi  x4, x4, 1; \
 291     li  x5, 2; \
 292     bne x4, x5, 1b \
 293
 294 #define TEST_ST_SRC12_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
 295 test_ ## testnum: \
 296     li  x28, testnum; \
 297     li  x4, 0; \
 298 1:  la  x1, result; \
 299     TEST_INSERT_NOPS_ ## src1_nops \
 300     la  x2, base; \
 301     TEST_INSERT_NOPS_ ## src2_nops \
 302     store_inst x1, offset(x2); \
 303     load_inst x3, offset(x2); \
 304     li  x29, result; \
 305     bne x3, x29, fail; \
 306     addi  x4, x4, 1; \
 307     li  x5, 2; \
 308     bne x4, x5, 1b \
 309
 310 #define TEST_ST_SRC21_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
 311 test_ ## testnum: \
 312     li  x28, testnum; \
 313     li  x4, 0; \
 314 1:  la  x2, base; \
 315     TEST_INSERT_NOPS_ ## src1_nops \
 316     la  x1, result; \
 317     TEST_INSERT_NOPS_ ## src2_nops \
 318     store_inst x1, offset(x2); \
 319     load_inst x3, offset(x2); \
 320     li  x29, result; \
 321     bne x3, x29, fail; \
 322     addi  x4, x4, 1; \
 323     li  x5, 2; \
 324     bne x4, x5, 1b \
 325
 326 #-----------------------------------------------------------------------
 327 # Test branch instructions
 328 #-----------------------------------------------------------------------
 329
 330 #define TEST_BR1_OP_TAKEN( testnum, inst, val1 ) \
 331 test_ ## testnum: \
 332     li  x28, testnum; \
 333     li  x1, val1; \
 334     inst x1, 2f; \
 335     bne x0, x28, fail; \
 336 1:  bne x0, x28, 3f; \
 337 2:  inst x1, 1b; \
 338     bne x0, x28, fail; \
 339 3:
 340
 341 #define TEST_BR1_OP_NOTTAKEN( testnum, inst, val1 ) \
 342 test_ ## testnum: \
 343     li  x28, testnum; \
 344     li  x1, val1; \
 345     inst x1, 1f; \
 346     bne x0, x28, 2f; \
 347 1:  bne x0, x28, fail; \
 348 2:  inst x1, 1b; \
 349 3:
 350
 351 #define TEST_BR1_SRC1_BYPASS( testnum, nop_cycles, inst, val1 ) \
 352 test_ ## testnum: \
 353     li  x28, testnum; \
 354     li  x4, 0; \
 355 1:  li  x1, val1; \
 356     TEST_INSERT_NOPS_ ## nop_cycles \
 357     inst x1, fail; \
 358     addi  x4, x4, 1; \
 359     li  x5, 2; \
 360     bne x4, x5, 1b \
 361
 362 #define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2 ) \
 363 test_ ## testnum: \
 364     li  x28, testnum; \
 365     li  x1, val1; \
 366     li  x2, val2; \
 367     inst x1, x2, 2f; \
 368     bne x0, x28, fail; \
 369 1:  bne x0, x28, 3f; \
 370 2:  inst x1, x2, 1b; \
 371     bne x0, x28, fail; \
 372 3:
 373
 374 #define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
 375 test_ ## testnum: \
 376     li  x28, testnum; \
 377     li  x1, val1; \
 378     li  x2, val2; \
 379     inst x1, x2, 1f; \
 380     bne x0, x28, 2f; \
 381 1:  bne x0, x28, fail; \
 382 2:  inst x1, x2, 1b; \
 383 3:
 384
 385 #define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
 386 test_ ## testnum: \
 387     li  x28, testnum; \
 388     li  x4, 0; \
 389 1:  li  x1, val1; \
 390     TEST_INSERT_NOPS_ ## src1_nops \
 391     li  x2, val2; \
 392     TEST_INSERT_NOPS_ ## src2_nops \
 393     inst x1, x2, fail; \
 394     addi  x4, x4, 1; \
 395     li  x5, 2; \
 396     bne x4, x5, 1b \
 397
 398 #define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
 399 test_ ## testnum: \
 400     li  x28, testnum; \
 401     li  x4, 0; \
 402 1:  li  x2, val2; \
 403     TEST_INSERT_NOPS_ ## src1_nops \
 404     li  x1, val1; \
 405     TEST_INSERT_NOPS_ ## src2_nops \
 406     inst x1, x2, fail; \
 407     addi  x4, x4, 1; \
 408     li  x5, 2; \
 409     bne x4, x5, 1b \
 410
 411 #-----------------------------------------------------------------------
 412 # Test jump instructions
 413 #-----------------------------------------------------------------------
 414
 415 #define TEST_JR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
 416 test_ ## testnum: \
 417     li  x28, testnum; \
 418     li  x4, 0; \
 419 1:  la  x6, 2f; \
 420     TEST_INSERT_NOPS_ ## nop_cycles \
 421     inst x6; \
 422     bne x0, x28, fail; \
 423 2:  addi  x4, x4, 1; \
 424     li  x5, 2; \
 425     bne x4, x5, 1b \
 426
 427 #define TEST_JALR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
 428 test_ ## testnum: \
 429     li  x28, testnum; \
 430     li  x4, 0; \
 431 1:  la  x6, 2f; \
 432     TEST_INSERT_NOPS_ ## nop_cycles \
 433     inst x19, x6, 0; \
 434     bne x0, x28, fail; \
 435 2:  addi  x4, x4, 1; \
 436     li  x5, 2; \
 437     bne x4, x5, 1b \
 438
 439
 440 #-----------------------------------------------------------------------
 441 # RV64UF MACROS
 442 #-----------------------------------------------------------------------
 443
 444 #-----------------------------------------------------------------------
 445 # Tests floating-point instructions
 446 #-----------------------------------------------------------------------
 447
 448 #define TEST_FP_OP_S_INTERNAL( testnum, result, val1, val2, val3, code... ) \
 449 test_ ## testnum: \
 450   li  x28, testnum; \
 451   la  a0, test_ ## testnum ## _data ;\
 452   flw f0, 0(a0); \
 453   flw f1, 4(a0); \
 454   flw f2, 8(a0); \
 455   lw  a3, 12(a0); \
 456   code; \
 457   bne a0, a3, fail; \
 458   b 1f; \
 459   .align 2; \
 460   test_ ## testnum ## _data: \
 461   .float val1; \
 462   .float val2; \
 463   .float val3; \
 464   .result; \
 465 1:
 466
 467 #define TEST_FP_OP_D_INTERNAL( testnum, result, val1, val2, val3, code... ) \
 468 test_ ## testnum: \
 469   li  x28, testnum; \
 470   la  a0, test_ ## testnum ## _data ;\
 471   fld f0, 0(a0); \
 472   fld f1, 8(a0); \
 473   fld f2, 16(a0); \
 474   ld  a3, 24(a0); \
 475   code; \
 476   bne a0, a3, fail; \
 477   b 1f; \
 478   .align 3; \
 479   test_ ## testnum ## _data: \
 480   .double val1; \
 481   .double val2; \
 482   .double val3; \
 483   .result; \
 484 1:
 485
 486 #define TEST_FCVT_S_D( testnum, result, val1 ) \
 487   TEST_FP_OP_D_INTERNAL( testnum, double result, val1, 0.0, 0.0, \
 488                     fcvt.s.d f3, f0; fcvt.d.s f3, f3; fmv.x.d a0, f3)
 489
 490 #define TEST_FCVT_D_S( testnum, result, val1 ) \
 491   TEST_FP_OP_S_INTERNAL( testnum, float result, val1, 0.0, 0.0, \
 492                     fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s a0, f3)
 493
 494 #define TEST_FP_OP1_S( testnum, inst, result, val1 ) \
 495   TEST_FP_OP_S_INTERNAL( testnum, float result, val1, 0.0, 0.0, \
 496                     inst f3, f0; fmv.x.s a0, f3)
 497
 498 #define TEST_FP_OP1_D( testnum, inst, result, val1 ) \
 499   TEST_FP_OP_D_INTERNAL( testnum, double result, val1, 0.0, 0.0, \
 500                     inst f3, f0; fmv.x.d a0, f3)
 501
 502 #define TEST_FP_OP2_S( testnum, inst, result, val1, val2 ) \
 503   TEST_FP_OP_S_INTERNAL( testnum, float result, val1, val2, 0.0, \
 504                     inst f3, f0, f1; fmv.x.s a0, f3)
 505
 506 #define TEST_FP_OP2_D( testnum, inst, result, val1, val2 ) \
 507   TEST_FP_OP_D_INTERNAL( testnum, double result, val1, val2, 0.0, \
 508                     inst f3, f0, f1; fmv.x.d a0, f3)
 509
 510 #define TEST_FP_OP3_S( testnum, inst, result, val1, val2, val3 ) \
 511   TEST_FP_OP_S_INTERNAL( testnum, float result, val1, val2, val3, \
 512                     inst f3, f0, f1, f2; fmv.x.s a0, f3)
 513
 514 #define TEST_FP_OP3_D( testnum, inst, result, val1, val2, val3 ) \
 515   TEST_FP_OP_D_INTERNAL( testnum, double result, val1, val2, val3, \
 516                     inst f3, f0, f1, f2; fmv.x.d a0, f3)
 517
 518 #define TEST_FP_INT_OP_S( testnum, inst, result, val1, rm ) \
 519   TEST_FP_OP_S_INTERNAL( testnum, word result, val1, 0.0, 0.0, \
 520                     inst a0, f0, rm)
 521
 522 #define TEST_FP_INT_OP_D( testnum, inst, result, val1, rm ) \
 523   TEST_FP_OP_D_INTERNAL( testnum, dword result, val1, 0.0, 0.0, \
 524                     inst a0, f0, rm)
 525
 526 #define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \
 527   TEST_FP_OP_S_INTERNAL( testnum, word result, val1, val2, 0.0, \
 528                     inst a0, f0, f1)
 529
 530 #define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \
 531   TEST_FP_OP_D_INTERNAL( testnum, dword result, val1, val2, 0.0, \
 532                     inst a0, f0, f1)
 533
 534 #define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
 535 test_ ## testnum: \
 536   li  x28, testnum; \
 537   la  a0, test_ ## testnum ## _data ;\
 538   lw  a3, 0(a0); \
 539   li  a0, val1; \
 540   inst f0, a0; \
 541   fmv.x.s a0, f0; \
 542   bne a0, a3, fail; \
 543   b 1f; \
 544   .align 2; \
 545   test_ ## testnum ## _data: \
 546   .float result; \
 547 1:
 548
 549 #define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
 550 test_ ## testnum: \
 551   li  x28, testnum; \
 552   la  a0, test_ ## testnum ## _data ;\
 553   ld  a3, 0(a0); \
 554   li  a0, val1; \
 555   inst f0, a0; \
 556   fmv.x.d a0, f0; \
 557   bne a0, a3, fail; \
 558   b 1f; \
 559   .align 3; \
 560   test_ ## testnum ## _data: \
 561   .double result; \
 562 1:
 563
 564
 565 #-----------------------------------------------------------------------
 566 # RV64UV MACROS
 567 #-----------------------------------------------------------------------
 568
 569 #define TEST_ILLEGAL_VT_REGID( testnum, nxreg, nfreg, inst, reg1, reg2, reg3) \
 570   mfpcr a0,cr0; \
 571   li a1,1; \
 572   slli a3,a1,8; \
 573   or a0,a0,a1; \
 574   mtpcr a0,cr0; \
 575   la a0, handler ## testnum; \
 576   mtpcr a0, cr3; \
 577   li a0, 4; \
 578   vvcfgivl a0, a0, nxreg, nfreg; \
 579   la a0, src1; \
 580   la a1, src2; \
 581   vld vx2, a0; \
 582   vld vx3, a1; \
 583   lui a0,%hi(vtcode1 ## testnum); \
 584   vf %lo(vtcode1 ## testnum)(a0); \
 585   la a3, dest; \
 586   vsd vx2, a3; \
 587   fence.v.l; \
 588 vtcode1 ## testnum: \
 589   add x2, x2, x3; \
 590 illegal ## testnum: \
 591   inst reg1, reg2, reg3; \
 592   stop; \
 593 vtcode2 ## testnum: \
 594   add x2, x2, x3; \
 595   stop; \
 596 handler ## testnum: \
 597   vxcptkill; \
 598   li x28,2; \
 599   mfpcr a0,cr6; \
 600   li a1,26; \
 601   bne a0,a1,fail; \
 602   mfpcr a0,cr2; \
 603   la a1,illegal ## testnum; \
 604   bne a0,a1,fail; \
 605   li a0,4; \
 606   vvcfgivl a0,a0,32,0; \
 607   la a0,src1; \
 608   la a1,src2; \
 609   vld vx2,a0; \
 610   vld vx3,a1; \
 611   lui a0,%hi(vtcode2 ## testnum); \
 612   vf %lo(vtcode2 ## testnum)(a0); \
 613   la a3,dest; \
 614   vsd vx2,a3; \
 615   fence.v.l; \
 616   ld a1,0(a3); \
 617   li a2,5; \
 618   li x28,2; \
 619   bne a1,a2,fail; \
 620   ld a1,8(a3); \
 621   li x28,3; \
 622   bne a1,a2,fail; \
 623   ld a1,16(a3); \
 624   li x28,4; \
 625   bne a1,a2,fail; \
 626   ld a1,24(a3); \
 627   li x28,5; \
 628   bne a1,a2,fail; \
 629
 630 #define TEST_ILLEGAL_TVEC_REGID( testnum, nxreg, nfreg, inst, reg1, reg2, aux) \
 631   mfpcr a0,cr0; \
 632   li a1,1; \
 633   slli a2,a1,8; \
 634   or a0,a0,a1; \
 635   mtpcr a0,cr0; \
 636   la a0, handler ## testnum; \
 637   mtpcr a0, cr3; \
 638   li a0, 4; \
 639   vvcfgivl a0, a0, nxreg, nfreg; \
 640   la a0, src1; \
 641   la a1, src2; \
 642   vld vx2, a0; \
 643   vld vx3, a1; \
 644   lui a0,%hi(vtcode1 ## testnum); \
 645   vf %lo(vtcode1 ## testnum)(a0); \
 646   la reg2, dest; \
 647 illegal ## testnum: \
 648   inst reg1, reg2; \
 649   la a3, dest; \
 650   vsd vx2, a3; \
 651   fence.v.l; \
 652 vtcode1 ## testnum: \
 653   add x2, x2, x3; \
 654   stop; \
 655 vtcode2 ## testnum: \
 656   add x2, x2, x3; \
 657   stop; \
 658 handler ## testnum: \
 659   vxcptkill; \
 660   li x28,2; \
 661   mfpcr a0,cr6; \
 662   li a1,27; \
 663   bne a0,a1,fail; \
 664   mfpcr a0, cr2; \
 665   li a1, aux; \
 666   bne a0, a1, fail; \
 667   li a0,4; \
 668   vvcfgivl a0,a0,32,0; \
 669   la a0,src1; \
 670   la a1,src2; \
 671   vld vx2,a0; \
 672   vld vx3,a1; \
 673   lui a0,%hi(vtcode2 ## testnum); \
 674   vf %lo(vtcode2 ## testnum)(a0); \
 675   la a3,dest; \
 676   vsd vx2,a3; \
 677   fence.v.l; \
 678   ld a1,0(a3); \
 679   li a2,5; \
 680   li x28,2; \
 681   bne a1,a2,fail; \
 682   ld a1,8(a3); \
 683   li x28,3; \
 684   bne a1,a2,fail; \
 685   ld a1,16(a3); \
 686   li x28,4; \
 687   bne a1,a2,fail; \
 688   ld a1,24(a3); \
 689   li x28,5; \
 690   bne a1,a2,fail; \
 691
 692
 693 #-----------------------------------------------------------------------
 694 # Pass and fail code (assumes test num is in x28)
 695 #-----------------------------------------------------------------------
 696
 697 #define TEST_PASSFAIL \
 698         bne x0, x28, pass; \
 699 fail: \
 700         RVTEST_FAIL \
 701 pass: \
 702         RVTEST_PASS \
 703
 704
 705 #-----------------------------------------------------------------------
 706 # Test data section
 707 #-----------------------------------------------------------------------
 708
 709 #define TEST_DATA
 710
 711 #endif