src/soc/fu/shift_rot/pipe_data.py

   1 from nmigen import Signal, Const
   2 from nmutil.dynamicpipe import SimpleHandshakeRedir
   3 from soc.fu.alu.alu_input_record import CompALUOpSubset
   4 from ieee754.fpcommon.getop import FPPipeContext
   5 from soc.fu.alu.pipe_data import IntegerData
   6
   7
   8 class ShiftRotInputData(IntegerData):
   9     def __init__(self, pspec):
  10         super().__init__(pspec)
  11         self.ra = Signal(64, reset_less=True) # RA
  12         self.rs = Signal(64, reset_less=True) # RS
  13         self.rb = Signal(64, reset_less=True) # RB/immediate
  14         self.xer_so = Signal(reset_less=True)    # XER bit 32: SO
  15         self.xer_ca = Signal(2, reset_less=True) # XER bit 34/45: CA/CA32
  16
  17     def __iter__(self):
  18         yield from super().__iter__()
  19         yield self.ra
  20         yield self.rs
  21         yield self.rb
  22         yield self.xer_ca
  23         yield self.xer_so
  24
  25     def eq(self, i):
  26         lst = super().eq(i)
  27         return lst + [self.rs.eq(i.rs), self.ra.eq(i.ra),
  28                       self.rb.eq(i.rb),
  29                       self.xer_ca.eq(i.xer_ca),
  30                       self.xer_so.eq(i.xer_so)]