make sure non-svp64-mode works

[soc.git] / Makefile

diff --git a/Makefile b/Makefile
index 28b8f38b1f2e7189b4e62b4c514691424e5957d2..0ab0037e775e143df33b60909638db64534c995f 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -38,7 +38,7 @@ testgpio_run_sim:
 ls180_verilog:
        python3 src/soc/simple/issuer_verilog.py \
                --debug=jtag --enable-core --enable-pll \
-               --enable-xics --enable-sram4x4kblock
+               --enable-xics --enable-sram4x4kblock --disable-svp64
                        src/soc/litex/florent/libresoc/libresoc.v
 
 test: install