import unittest
import sys
+
+# here is the logic which takes test cases and "executes" them.
+# in this instance (TestRunner) its job is to instantiate both
+# a Libre-SOC nmigen-based HDL instance and an ISACaller python
+# simulator. it's also responsible for performing the single
+# step and comparison.
from soc.simple.test.test_runner import TestRunner
# test with ALU data and Logical data
-from soc.fu.alu.test.test_pipe_caller import ALUTestCase
-from soc.fu.div.test.test_pipe_caller import DivTestCases
-from soc.fu.logical.test.test_pipe_caller import LogicalTestCase
-from soc.fu.shift_rot.test.test_pipe_caller import ShiftRotTestCase
-from soc.fu.cr.test.test_pipe_caller import CRTestCase
-# from soc.fu.branch.test.test_pipe_caller import BranchTestCase
+from openpower.test.alu.alu_cases import ALUTestCase
+from openpower.test.div.div_cases import DivTestCases
+from openpower.test.logical.logical_cases import LogicalTestCase
+from openpower.test.shift_rot.shift_rot_cases import ShiftRotTestCase
+from openpower.test.cr.cr_cases import CRTestCase
+from openpower.test.branch.branch_cases import BranchTestCase
# from soc.fu.spr.test.test_pipe_caller import SPRTestCase
-from soc.fu.ldst.test.test_pipe_caller import LDSTTestCase
+from openpower.test.ldst.ldst_cases import LDSTTestCase
from openpower.simulator.test_sim import (GeneralTestCases, AttnTestCase)
# from openpower.simulator.test_helloworld_sim import HelloTestCases
suite.addTest(TestRunner(ShiftRotTestCase().test_data, svp64=svp64))
suite.addTest(TestRunner(LogicalTestCase().test_data, svp64=svp64))
suite.addTest(TestRunner(ALUTestCase().test_data, svp64=svp64))
- # suite.addTest(TestRunner(BranchTestCase.test_data, svp64=svp64))
+ suite.addTest(TestRunner(BranchTestCase().test_data, svp64=svp64))
# suite.addTest(TestRunner(SPRTestCase.test_data, svp64=svp64))
runner = unittest.TextTestRunner()