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2020-09-20	Luke Kenneth Casson...	first version code-morph on dmi2jtag	commit \| commitdiff \| tree
2020-09-19	Luke Kenneth Casson...	add pc_o not connected	commit \| commitdiff \| tree
2020-09-19	Luke Kenneth Casson...	set ROM to empty, set SRAM to tiny 0x200, get things...	commit \| commitdiff \| tree
2020-09-19	Luke Kenneth Casson...	urk. wishbone slave devices declared incorrectly (I...	commit \| commitdiff \| tree
2020-09-19	Luke Kenneth Casson...	disable internal RAM set SRAM to much smaller	commit \| commitdiff \| tree
2020-09-19	Luke Kenneth Casson...	shrink size of SRAM to 8k, move things around	commit \| commitdiff \| tree
2020-09-19	Luke Kenneth Casson...	add (disabled) tri-state GPIO	commit \| commitdiff \| tree
2020-09-19	Luke Kenneth Casson...	remove the gpio peripheral which was previously hard...	commit \| commitdiff \| tree
2020-09-19	Luke Kenneth Casson...	add 3x EINTs to ls180soc	commit \| commitdiff \| tree
2020-09-18	Luke Kenneth Casson...	add SPI, sdcard, preliminary GPIO to ls180 pinouts	commit \| commitdiff \| tree
2020-09-18	Luke Kenneth Casson...	argh got fed up trying to shoe-horn into sim.py	commit \| commitdiff \| tree
2020-09-18	Luke Kenneth Casson...	can remove unneeded overrides of Prev/Next Control	commit \| commitdiff \| tree
2020-09-17	Luke Kenneth Casson...	add versa ecp5 fpga litex build script	commit \| commitdiff \| tree
2020-09-16	Luke Kenneth Casson...	make a start on LS180 platform	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add back (totally confusing) accidentally-removed code...	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	instantiate MMU from AllFunctionUnits	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	do not need FAST regs in MMU	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	comment mmu test	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add edge-triggering to dcache/mmu "valid"	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add set MTSPR prtbl to mmu unit test	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add OP_MFSPR to mmu	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	use convenience vars	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add OP_TLBIE to mmu fsm	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add OP_DCBZ to mmu fsm, needs RA to be added to MMU...	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add MMU MTSPR connection into FSM	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add in MMU and DCache into MMU FSM	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	moved PLRU to nmutil	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add mmu fsm	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	remove more (confusing/spurious) types, should be in...	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	remove more (confusing/spurious) types, should be in...	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	remove more (confusing/spurious) types, should be in...	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	removed (confusing/spurious) types, should be in .pyi...	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add MMU FunctionUnit	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	mmu uses RB, go with it	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add OP_TLBIE	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add mmu initial pipe_data.py	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add extra "modes" to PortInterface	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	syntax error correction	commit \| commitdiff \| tree
2020-09-15	Luke Kenneth Casson...	add inline comments into icache.py	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	increase TLB_NUM_WAYS to 4	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	vhdl conversion not really working for plru	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	add array signal names	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	rename plru input	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	rename plru input	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	reorg mmu lookup test so it is called twice	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	TLB PLRUs are of TLB_WAY_BITS width	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	fix mmu perms/lookup in dcache	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	whitespace	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	remove duplicated signal	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	comments on icache	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	get rid of rst	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	use word_select	commit \| commitdiff \| tree
2020-09-14	Luke Kenneth Casson...	add mmu-dcache test	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	dcache truncate wishbone address, store real_addr in...	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	last mmu get seems ok	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	whoops recursion error v.shift calculated from v.shift	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	more experimenting with mmu READ_WAIT state	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	radix tree wait error, investigating	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	mmu test starting to make sense	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	floundering around with MMU unit test, no idea what...	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	mmu code-morph	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	code-morph, add masked function	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	move code to mmu_0	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	add example radix walk from power-gem5	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	MMU test	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	submodule update	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	clarify	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	sort out ariane PLRU, rename/clarify	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	minor error in plru	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	rename cache_valid_bits to cache_validsg	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	cache_valid_idx too large in dcache	commit \| commitdiff \| tree
2020-09-13	Luke Kenneth Casson...	whoops, cache valid array too small in dcache	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	more dcache debugging	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	missing reservation address comparison	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	dcache tidyup	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	more dcache debugging	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	add random dcache mem test	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	cache valid corrupted: fixed	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	adding names to array signals	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	whoops, indentation error	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	enable Display debugs	commit \| commitdiff \| tree
2020-09-12	Luke Kenneth Casson...	set bytesel in dcache store	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	separat stbs_done into ld/st	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	dcache load/store test	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	debugging dcache	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	wrong width for data / addr	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	connect up WB SRAM to dcache test	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	start on dcache test	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	missing comb +=	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	missing maybe_tlb_plrus	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	WAY_BITS not TLB_WAY_BITS	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	whoops new node not to be calculated at end	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	try to get better DTLBUpdate	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	simplify dcache pending	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	move dcache pending test to separate module	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	more error correction in dcache	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	use module for TLBUpdate	commit \| commitdiff \| tree
2020-09-11	Luke Kenneth Casson...	add brackets round if & in dcache	commit \| commitdiff \| tree
2020-09-10	Luke Kenneth Casson...	simplify read/write pte	commit \| commitdiff \| tree
2020-09-10	Luke Kenneth Casson...	eek, big sort-out of syntax errors in dcache.py, now...	commit \| commitdiff \| tree
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