using new single spblock_512xxx in experiments9
[soclayout.git] / experiments9 / Makefile
2021-04-30 Luke Kenneth Casso... using new single spblock_512xxx in experiments9
2021-04-18 Luke Kenneth Casso... argh, found the blackbox problem: yosys is "doing the...
2021-04-18 Luke Kenneth Casso... try renaming spblock without the underscore
2021-04-18 Luke Kenneth Casso... experimenting with blackboxes
2021-04-18 Luke Kenneth Casso... rename blackboxes to lowercase, spblock_512w64b8w, pll
2021-04-18 Luke Kenneth Casso... add yosys BLACKBOX SPBlock_512W64B8W - still blif2vst...
2021-04-10 Luke Kenneth Casso... make VST names unique, for GHDL to cope
2021-04-09 Luke Kenneth Casso... rename design of experiments10 to match ls180 chip...
2020-11-13 Luke Kenneth Casso... test of litex peripherals back in (not full core)
2020-11-08 Luke Kenneth Casso... start conversion of ls180 to new niolib
2020-10-02 Luke Kenneth Casso... really really cut down core
2020-09-27 Luke Kenneth Casso... Makefile add chip building
2020-09-27 Luke Kenneth Casso... add link to pinmux generation for use in ioring.py
2020-09-19 Luke Kenneth Casso... first attempt putting in litex pins instead of bare...
2020-09-15 Jean-Paul ChaputUse Yosys flattening for top blocks.
2020-08-03 Jean-Paul ChaputFisrt attempt at floorplaning test_issuer.
2020-06-30 Jean-Paul ChaputAdded experments9, a first taste at the full scale...