src/soc/config/loadstore.py

   1 """ConfigureableLoadStoreUnit and ConfigMemoryPortInterface
   2
   3 allows the type of LoadStoreUnit to be run-time selectable
   4
   5 this allows the same code to be used for both small unit tests
   6 as well as larger ones and so on, without needing large amounts
   7 of unnecessarily-duplicated code
   8 """
   9 from soc.experiment.lsmem import TestMemLoadStoreUnit
  10 from soc.bus.test.test_minerva import TestSRAMBareLoadStoreUnit
  11 from soc.experiment.pi2ls import Pi2LSUI
  12 from soc.experiment.pimem import TestMemoryPortInterface
  13
  14 class ConfigLoadStoreUnit:
  15     def __init__(self, pspec):
  16         lsidict = {'testmem': TestMemLoadStoreUnit,
  17                    'test_bare_wb': TestSRAMBareLoadStoreUnit,
  18                    #'test_cache_wb': TestCacheLoadStoreUnit
  19                   }
  20         lsikls = lsidict[pspec.ldst_ifacetype]
  21         self.lsi = lsikls(addr_wid=pspec.addr_wid, # address range
  22                           mask_wid=pspec.mask_wid, # cache line range
  23                           data_wid=pspec.reg_wid)  # data bus width
  24
  25
  26 class ConfigMemoryPortInterface:
  27     def __init__(self, pspec):
  28         if pspec.ldst_ifacetype == 'testpi':
  29             self.pi = TestMemoryPortInterface(addrwid=pspec.addr_wid, # adr bus
  30                                               regwid=pspec.reg_wid) # data bus
  31             return
  32         self.lsmem = ConfigLoadStoreUnit(pspec)
  33         self.pi = Pi2LSUI("mem", lsui=self.lsmem.lsi,
  34                           addr_wid=pspec.addr_wid, # address range
  35                           mask_wid=pspec.mask_wid, # cache line range
  36                           data_wid=pspec.reg_wid)  # data bus width