Added English Language description for stb instruction
[openpower-isa.git] / openpower / isa /
2023-04-18 Jacob Lifshayadd shaddw
2023-04-18 Jacob Lifshayspelling fix
2023-03-29 Luke Kenneth Casso... remove DCT/iDCT redundant modes which require less...
2023-03-25 Luke Kenneth Casso... update comments on svstep returning pack/unpack state
2023-03-25 Luke Kenneth Casso... updated simplev setvl specification pseudocode: MAJOR...
2023-03-08 Luke Kenneth Casso... update pseudocode for dsld/dsrd to note that only when...
2023-01-24 Dmitry Selyutinbitmanip.mdwn: add missing Rc static operand
2022-11-11 Jacob Lifshayadd maddedus
2022-11-11 Jacob LifshayXLEN-ify maddedu
2022-11-11 Jacob Lifshayfix maddedu title line
2022-11-01 Dmitry Selyutinbitmanip.mdwn: avoid overflow for m variable
2022-11-01 Dmitry SelyutinRevert "Revert "https://bugs.libre-soc.org/show_bug...
2022-11-01 Dmitry SelyutinRevert "corrections to shadd/uw after reverting to...
2022-11-01 Luke Kenneth Casso... corrections to shadd/uw after reverting to switch
2022-11-01 Luke Kenneth Casso... Revert "https://bugs.libre-soc.org/show_bug.cgi?id...
2022-10-28 Luke Kenneth Casso... dsld: MASK(0, 63-n) works just as well as MASK(64,...
2022-10-28 Luke Kenneth Casso... overflow condition in dsld and dsrd if RS is non-zero
2022-10-28 Luke Kenneth Casso... fix dsrd pseudocode to use ROTL64 not ROTL128
2022-10-28 Luke Kenneth Casso... fix dsld pseudocode to use ROTL64 instead of ROTL128
2022-10-28 Luke Kenneth Casso... fix dsrd, ROTL128 use 128-n not 64-n,
2022-10-28 Luke Kenneth Casso... fix dsrd pseudocode for new 3-in 2-out
2022-10-28 Luke Kenneth Casso... sort out dsld pseudocode, creating mask is tricky
2022-10-28 Luke Kenneth Casso... endeavouring to implement shift-carry-dsld
2022-10-28 Luke Kenneth Casso... first cut pseudocode for dsld/dsrd to be 3-in 1-out,
2022-10-27 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=966#c4
2022-10-25 Luke Kenneth Casso... code-comments on divmod2du and maddedu are wrong
2022-10-25 Luke Kenneth Casso... comments
2022-10-25 Luke Kenneth Casso... shadd pseudocode cleanup
2022-10-25 Dmitry Selyutinbitmanip.mdwn: support shadd/shadduw instructions
2022-10-24 Luke Kenneth Casso... add maxs. combined with cmp capability
2022-10-22 Luke Kenneth Casso... argh, extremely annoying: 4-operand dsld/dsrd is not...
2022-10-22 Luke Kenneth Casso... bigint shuffle
2022-10-21 Luke Kenneth Casso... use XLEN/2 for ROTL32 in fixedshift.mdwn
2022-10-20 Luke Kenneth Casso... add first chacha20 round test
2022-10-19 Dmitry Selyutinav.mdwn: fix missing bmask operand
2022-10-17 Dmitry Selyutinav.mdwn: fix Rc-augmented cprop instruction
2022-10-14 Luke Kenneth Casso... whoops missed an update MEM(EA...) in pifixedstore
2022-10-14 Luke Kenneth Casso... add sv.stwu/pi example in test_sv_load_store_postinc
2022-10-11 Luke Kenneth Casso... whoops ea not ra in pifixedstore.mdwn
2022-10-11 Luke Kenneth Casso... add Post-increment version of fixedstore.mdwn
2022-10-11 Luke Kenneth Casso... add experimental post-increment fixedload pseudocode
2022-10-10 Luke Kenneth Casso... add elwidth overrides on Indexed REMAP, 8-bit example...
2022-10-08 Luke Kenneth Casso... misnamed instruction, lfiwzx
2022-10-01 Luke Kenneth Casso... remove special case from setvl calling SVSTATE_NEXT,
2022-10-01 Jacob Lifshayincrease pcdec. output compression by skipping impossib...
2022-09-30 Jacob Lifshayrewrite pcdec. pseudocode to work better for JPEG
2022-09-29 Jacob Lifshayrename madded->maddedu for consistency with PowerISA...
2022-09-29 Jacob Lifshayrename divrem2du->divmod2du for consistency with PowerI...
2022-09-29 Jacob Lifshayadd bigint tests and fix madded pseudocode
2022-09-29 Jacob Lifshayfill out dsld/dsrd pseudocode
2022-09-29 Jacob Lifshayclean up bigint instruction naming
2022-09-28 Luke Kenneth Casso... new revision of dsld
2022-09-28 Luke Kenneth Casso... add double-sld pseudocode, first draft
2022-09-28 Luke Kenneth Casso... whoops VL incorrect in svshape markdown RTL for matrix...
2022-09-26 Jacob Lifshayadd more tests and fix missing corner case
2022-09-26 Jacob Lifshaypcdec.: change CR0.eq to be early-stop-needed to fit...
2022-09-26 Jacob Lifshaymore cleanup after swapping RA/RB for pcdec.
2022-09-26 Jacob Lifshayclean up after lkcl swapped RA/RB for pcdec.
2022-09-26 Luke Kenneth Casso... swap RA/RB so that RA|0 is used not RB|0
2022-09-24 Jacob Lifshaypcdec. works!
2022-09-23 Luke Kenneth Casso... grr annoying recurrence of svshape bug, mscale starts...
2022-09-23 Luke Kenneth Casso... lots of really bad hacks, here
2022-09-23 Jacob Lifshayadd pcdec -- doesn't yet work due to broken ISACaller...
2022-09-23 Jacob Lifshayfix maddld pseudo-code
2022-09-22 Luke Kenneth Casso... add first (correctly-working) ctr-mode sv.bc test
2022-09-21 Luke Kenneth Casso... do not set striding on costables, keep them contiguous.
2022-09-21 Luke Kenneth Casso... scale-up svshape pseudo-code for striding in DCT/FFT
2022-09-21 Luke Kenneth Casso... missed setting zdim in svshape on DCT modes
2022-09-21 Luke Kenneth Casso... add SVzd to REMAP (svshape) "stride"
2022-09-18 Luke Kenneth Casso... add new svstep mode setting up pack/unpack
2022-09-15 Luke Kenneth Casso... fix sprset mtspr/mfspr pseudocode with wrong definition of
2022-09-12 Jacob Lifshayadd pseudocode for all fptrans ops
2022-09-12 Jacob Lifshayadd fptrans helpers, switching existing uses to new...
2022-09-12 Luke Kenneth Casso... split out setvl from sv.setvl test in test_pysvp64dis.py
2022-09-08 Luke Kenneth Casso... rename svshape and svoffset fields
2022-09-08 Dmitry Selyutinsvshape2: rename fields
2022-09-06 Luke Kenneth Casso... add first functional confirmed unit test for parallel...
2022-09-06 Luke Kenneth Casso... REMAP parallel-reduce:
2022-09-06 Luke Kenneth Casso... add dummy fixedsync.mdwn pseudocode for lwarx/stbcx...
2022-09-04 Dmitry SelyutinRevert "target_addr in b and bc pseudo-code has no...
2022-09-04 Dmitry SelyutinRevert "svbranch.mdwn: replace target_addr with BD"
2022-09-03 Luke Kenneth Casso... Revert "add inv option to svshape2 (only 1 bit)"
2022-09-03 Luke Kenneth Casso... add inv option to svshape2 (only 1 bit)
2022-09-02 Luke Kenneth Casso... add first svshape2 pseudocode, based on svindex
2022-09-02 Luke Kenneth Casso... add svshape2 (stub pseudocode) fields, Form, and CSV...
2022-09-01 Luke Kenneth Casso... ghostmansd found that extswsli is incorrectly declared
2022-09-01 Dmitry Selyutinsvbranch.mdwn: replace target_addr with BD
2022-09-01 Jacob Lifshaymove fsins/fcoss to fptrans.mdwn -- they are transcende...
2022-08-31 Luke Kenneth Casso... target_addr in b and bc pseudo-code has no corresponding
2022-08-30 Dmitry Selyutinbcd.mdwn: fix cbcdtd operands
2022-08-30 Dmitry Selyutinbcd.mdwn: fix cdtbcd operands
2022-08-30 Dmitry Selyutinfixedlogical.mdwn: fix bpermd operands
2022-08-30 Luke Kenneth Casso... remove space from arguments in popcnt, should not have...
2022-08-30 Luke Kenneth Casso... correct the bitmanip pseudocode to remove spaces from...
2022-08-26 Luke Kenneth Casso... initialise overflow to zero in setvl, unconditionally.
2022-08-26 Luke Kenneth Casso... sigh, update setvl tests, to spec, and ISACaller
2022-08-26 Luke Kenneth Casso... add setvl unit tests for overflow condition.
2022-08-26 Luke Kenneth Casso... put back overflow in setvl, TODO actually set an overfl...
2022-08-26 Luke Kenneth Casso... okaaaay, long story. using GPR(_RT) <- something will...
2022-08-26 Luke Kenneth Casso... Revert "fix setvl. not setting CR0 properly"
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