test all fp -> int conversion modes
[openpower-isa.git] / openpower / isa /
2023-05-17 Jacob Lifshayfix bug in fcvttg OpenPower and saturating conversion
2023-05-17 Jacob Lifshayrephrase to avoid personal pronouns
2023-05-17 Jacob Lifshayduplicate overflow comment as requested by luke
2023-05-16 Jacob Lifshayfix fcvttg* overflow/FPSCR computation
2023-05-13 Jacob Lifshayfix bugs in fcvt* pseudocode
2023-05-12 Jacob Lifshayundefined is a function that needs to be called
2023-05-10 Jacob LifshayMerge branch 'support-fields'
2023-05-09 Jacob Lifshayswitch fpcvt over to using FPSCR attributes
2023-05-04 Konstantinos Marga... merge maddrs/msubrs, unit tests changed accordingly
2023-05-04 Konstantinos Marga... Add 2 more instructions to help with 2-coeff butterfly
2023-05-04 Konstantinos Marga... use a simpler way to do the same thing
2023-05-04 Konstantinos Marga... Handle large 64-bit values, but only the low 64-bit...
2023-05-04 Konstantinos Marga... do proper rounding, no rounding for SH=0 (for now)...
2023-05-04 Konstantinos Marga... Result needs rounding so add +1 to prod*
2023-05-04 Konstantinos Marga... handle negatives correctly by adding sign bit to final...
2023-05-04 Konstantinos Marga... almost there, positive values work, negative values...
2023-05-04 Konstantinos Marga... use proper register sizes
2023-05-04 Konstantinos Marga... MULS instead of MUL, RA instead of RT in in1
2023-05-04 Konstantinos Marga... Turns out DCTI-Form is another variant of A-Form
2023-05-04 Konstantinos Marga... minor fixes in pseudocode, CONST_UI->CONST_SH in minor_...
2023-05-04 Konstantinos Marga... WIP: maddsubrs initial approach
2023-05-04 Jacob Lifshayadd fcvt/fmv -- no tests yet
2023-05-04 Jacob Lifshaycomment fmin*/fmax* since they're being replaced with...
2023-04-30 Luke Kenneth Casso... ffnmadds converted to 3-operand
2023-04-30 Luke Kenneth Casso... converted ffnmadds to 3-operand
2023-04-30 Luke Kenneth Casso... ffmsubs number of operands reduced to match ffmadds
2023-04-28 Luke Kenneth Casso... reduce number of operands to ffmadds as well
2023-04-28 Jacob Lifshayprefix-sum remap works!
2023-04-28 Luke Kenneth Casso... reduce fdmadds down to only 3 operands, RT-overwrite...
2023-04-27 Luke Kenneth Casso... add SVSHAPE setup for parallel/prefix but it refuses...
2023-04-25 Jacob Lifshayreplace min/max[su][.] with minmax[.]
2023-04-21 Jacob Lifshayrewrite all uses of XLCASTU/XLCASTS
2023-04-20 Jacob Lifshayuse proper cast function
2023-04-20 Jacob Lifshaychange XLEN-ification
2023-04-20 Jacob Lifshaychange extsb/h/w to scale based on XLEN rather than...
2023-04-18 Jacob Lifshayadd shaddw
2023-04-18 Jacob Lifshayspelling fix
2023-03-29 Luke Kenneth Casso... remove DCT/iDCT redundant modes which require less...
2023-03-25 Luke Kenneth Casso... update comments on svstep returning pack/unpack state
2023-03-25 Luke Kenneth Casso... updated simplev setvl specification pseudocode: MAJOR...
2023-03-08 Luke Kenneth Casso... update pseudocode for dsld/dsrd to note that only when...
2023-01-24 Dmitry Selyutinbitmanip.mdwn: add missing Rc static operand
2022-11-11 Jacob Lifshayadd maddedus
2022-11-11 Jacob LifshayXLEN-ify maddedu
2022-11-11 Jacob Lifshayfix maddedu title line
2022-11-01 Dmitry Selyutinbitmanip.mdwn: avoid overflow for m variable
2022-11-01 Dmitry SelyutinRevert "Revert "https://bugs.libre-soc.org/show_bug...
2022-11-01 Dmitry SelyutinRevert "corrections to shadd/uw after reverting to...
2022-11-01 Luke Kenneth Casso... corrections to shadd/uw after reverting to switch
2022-11-01 Luke Kenneth Casso... Revert "https://bugs.libre-soc.org/show_bug.cgi?id...
2022-10-28 Luke Kenneth Casso... dsld: MASK(0, 63-n) works just as well as MASK(64,...
2022-10-28 Luke Kenneth Casso... overflow condition in dsld and dsrd if RS is non-zero
2022-10-28 Luke Kenneth Casso... fix dsrd pseudocode to use ROTL64 not ROTL128
2022-10-28 Luke Kenneth Casso... fix dsld pseudocode to use ROTL64 instead of ROTL128
2022-10-28 Luke Kenneth Casso... fix dsrd, ROTL128 use 128-n not 64-n,
2022-10-28 Luke Kenneth Casso... fix dsrd pseudocode for new 3-in 2-out
2022-10-28 Luke Kenneth Casso... sort out dsld pseudocode, creating mask is tricky
2022-10-28 Luke Kenneth Casso... endeavouring to implement shift-carry-dsld
2022-10-28 Luke Kenneth Casso... first cut pseudocode for dsld/dsrd to be 3-in 1-out,
2022-10-27 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=966#c4
2022-10-25 Luke Kenneth Casso... code-comments on divmod2du and maddedu are wrong
2022-10-25 Luke Kenneth Casso... comments
2022-10-25 Luke Kenneth Casso... shadd pseudocode cleanup
2022-10-25 Dmitry Selyutinbitmanip.mdwn: support shadd/shadduw instructions
2022-10-24 Luke Kenneth Casso... add maxs. combined with cmp capability
2022-10-22 Luke Kenneth Casso... argh, extremely annoying: 4-operand dsld/dsrd is not...
2022-10-22 Luke Kenneth Casso... bigint shuffle
2022-10-21 Luke Kenneth Casso... use XLEN/2 for ROTL32 in fixedshift.mdwn
2022-10-20 Luke Kenneth Casso... add first chacha20 round test
2022-10-19 Dmitry Selyutinav.mdwn: fix missing bmask operand
2022-10-17 Dmitry Selyutinav.mdwn: fix Rc-augmented cprop instruction
2022-10-14 Luke Kenneth Casso... whoops missed an update MEM(EA...) in pifixedstore
2022-10-14 Luke Kenneth Casso... add sv.stwu/pi example in test_sv_load_store_postinc
2022-10-11 Luke Kenneth Casso... whoops ea not ra in pifixedstore.mdwn
2022-10-11 Luke Kenneth Casso... add Post-increment version of fixedstore.mdwn
2022-10-11 Luke Kenneth Casso... add experimental post-increment fixedload pseudocode
2022-10-10 Luke Kenneth Casso... add elwidth overrides on Indexed REMAP, 8-bit example...
2022-10-08 Luke Kenneth Casso... misnamed instruction, lfiwzx
2022-10-01 Luke Kenneth Casso... remove special case from setvl calling SVSTATE_NEXT,
2022-10-01 Jacob Lifshayincrease pcdec. output compression by skipping impossib...
2022-09-30 Jacob Lifshayrewrite pcdec. pseudocode to work better for JPEG
2022-09-29 Jacob Lifshayrename madded->maddedu for consistency with PowerISA...
2022-09-29 Jacob Lifshayrename divrem2du->divmod2du for consistency with PowerI...
2022-09-29 Jacob Lifshayadd bigint tests and fix madded pseudocode
2022-09-29 Jacob Lifshayfill out dsld/dsrd pseudocode
2022-09-29 Jacob Lifshayclean up bigint instruction naming
2022-09-28 Luke Kenneth Casso... new revision of dsld
2022-09-28 Luke Kenneth Casso... add double-sld pseudocode, first draft
2022-09-28 Luke Kenneth Casso... whoops VL incorrect in svshape markdown RTL for matrix...
2022-09-26 Jacob Lifshayadd more tests and fix missing corner case
2022-09-26 Jacob Lifshaypcdec.: change CR0.eq to be early-stop-needed to fit...
2022-09-26 Jacob Lifshaymore cleanup after swapping RA/RB for pcdec.
2022-09-26 Jacob Lifshayclean up after lkcl swapped RA/RB for pcdec.
2022-09-26 Luke Kenneth Casso... swap RA/RB so that RA|0 is used not RB|0
2022-09-24 Jacob Lifshaypcdec. works!
2022-09-23 Luke Kenneth Casso... grr annoying recurrence of svshape bug, mscale starts...
2022-09-23 Luke Kenneth Casso... lots of really bad hacks, here
2022-09-23 Jacob Lifshayadd pcdec -- doesn't yet work due to broken ISACaller...
2022-09-23 Jacob Lifshayfix maddld pseudo-code
2022-09-22 Luke Kenneth Casso... add first (correctly-working) ctr-mode sv.bc test
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