finish changing to use adde, not addeo for bigint add
[openpower-isa.git] / openpower /
2022-09-29 Jacob Lifshayrename madded->maddedu for consistency with PowerISA...
2022-09-29 Jacob Lifshayrename divrem2du->divmod2du for consistency with PowerI...
2022-09-29 Jacob Lifshayadd bigint tests and fix madded pseudocode
2022-09-29 Jacob Lifshayadd bigint ops
2022-09-29 Jacob Lifshayfill out dsld/dsrd pseudocode
2022-09-29 Jacob Lifshayclean up bigint instruction naming
2022-09-29 Jacob Lifshayadd unofficial and comment2 fields to minor_31.csv
2022-09-28 Luke Kenneth Casso... new revision of dsld
2022-09-28 Luke Kenneth Casso... add double-sld pseudocode, first draft
2022-09-28 Luke Kenneth Casso... add Z23 shift-mode fields.txt
2022-09-28 Luke Kenneth Casso... whoops VL incorrect in svshape markdown RTL for matrix...
2022-09-26 Jacob Lifshayadd more tests and fix missing corner case
2022-09-26 Jacob Lifshaypcdec.: change CR0.eq to be early-stop-needed to fit...
2022-09-26 Jacob Lifshaymore cleanup after swapping RA/RB for pcdec.
2022-09-26 Jacob Lifshayclean up after lkcl swapped RA/RB for pcdec.
2022-09-26 Luke Kenneth Casso... swap RA/RB so that RA|0 is used not RB|0
2022-09-24 Jacob Lifshaypcdec. works!
2022-09-23 Luke Kenneth Casso... grr annoying recurrence of svshape bug, mscale starts...
2022-09-23 Luke Kenneth Casso... remove need for explicit-hack for "pcdec." - rc column...
2022-09-23 Luke Kenneth Casso... lots of really bad hacks, here
2022-09-23 Luke Kenneth Casso... reduce field name lengths (not in use)
2022-09-23 Jacob Lifshayadd pcdec -- doesn't yet work due to broken ISACaller...
2022-09-23 Jacob Lifshayfix maddld pseudo-code
2022-09-23 Jacob Lifshaymaddhd[u]/maddld are official ops
2022-09-22 Luke Kenneth Casso... add first (correctly-working) ctr-mode sv.bc test
2022-09-21 Luke Kenneth Casso... do not set striding on costables, keep them contiguous.
2022-09-21 Luke Kenneth Casso... scale-up svshape pseudo-code for striding in DCT/FFT
2022-09-21 Luke Kenneth Casso... missed setting zdim in svshape on DCT modes
2022-09-21 Luke Kenneth Casso... add SVzd to REMAP (svshape) "stride"
2022-09-21 Luke Kenneth Casso... add sv.madd* to sv_analysis
2022-09-20 Luke Kenneth Casso... sv.bc reclassified as RM-2P-1S by eliminating SPRs.
2022-09-18 Luke Kenneth Casso... add new svstep mode setting up pack/unpack
2022-09-17 Luke Kenneth Casso... add SVmask_src enum, rename fields to EN and NO to...
2022-09-17 Luke Kenneth Casso... as a double-check sv_analysis new CSV column "SM" was...
2022-09-17 Luke Kenneth Casso... add a "SM" column into RM*.csv (and LDSTRM*.csv) identi...
2022-09-15 Luke Kenneth Casso... add minor_4.csv for maddld/maddhdu/maddhd and to insn_d...
2022-09-15 Luke Kenneth Casso... fix sprset mtspr/mfspr pseudocode with wrong definition of
2022-09-14 Jacob Lifshayfix sv_analysis for fpown and frootn
2022-09-13 Jacob Lifshayfix X-FORM lines for fptrans -- I forgot Rc
2022-09-13 Jacob Lifshayadd missing X-FORM lines for fptrans
2022-09-12 Jacob Lifshayadd pseudocode for all fptrans ops
2022-09-12 Jacob Lifshayadd fptrans helpers, switching existing uses to new...
2022-09-12 Jacob Lifshayadd rest of new fptrans ops to CSVs
2022-09-12 Luke Kenneth Casso... add sv.setvl to instructions as a major hack
2022-09-12 Luke Kenneth Casso... split out setvl from sv.setvl test in test_pysvp64dis.py
2022-09-12 Luke Kenneth Casso... some weird moving of opcodes around, probably because...
2022-09-12 Jacob Lifshayfix svanalysis failing due to missing comma in addpcis...
2022-09-11 Luke Kenneth Casso... add missing addpcis to power_enums.py and minor_19.csv
2022-09-11 Luke Kenneth Casso... convert minor_19 to bitpattern (for adding addpcis)
2022-09-10 Dmitry Selyutinpower_insn: yet another take on the opcodes
2022-09-10 Dmitry Selyutinfields.text: this fish ain't moving
2022-09-10 Jacob Lifshayreallocate fcbrt(s) to match new fptrans allocations
2022-09-10 Jacob Lifshaymove ffadds to not conflict with fptrans -- makes space...
2022-09-09 Luke Kenneth Casso... "D" of fishmv RT,D has to be done as a custom field
2022-09-09 Dmitry Selyutinfields.text: this fish ain't moving
2022-09-09 Dmitry Selyutinminor_22: make svshape2 really shaped
2022-09-09 Dmitry Selyutinminor_31: fix setb form
2022-09-09 Dmitry Selyutinminor_30: fix rldicl form
2022-09-09 Luke Kenneth Casso... added missing RA RB RT to TLI-Form fields.txt
2022-09-09 Dmitry Selyutinmajor: fix andi./andis. form
2022-09-09 Dmitry Selyutinminor_30: fix rldcl/rldcr forms
2022-09-08 Luke Kenneth Casso... rename svshape and svoffset fields
2022-09-08 Dmitry Selyutinsvshape2: rename fields
2022-09-06 Luke Kenneth Casso... add first functional confirmed unit test for parallel...
2022-09-06 Luke Kenneth Casso... REMAP parallel-reduce:
2022-09-06 Jacob Lifshayfix incorrect comment
2022-09-06 Jacob Lifshayadd all fptrans ops to CSVs
2022-09-06 Jacob Lifshayadd unofficial and comment2 fields to minor_63.csv
2022-09-06 Luke Kenneth Casso... removing two unused fields (E) which somehow
2022-09-06 Luke Kenneth Casso... add dummy fixedsync.mdwn pseudocode for lwarx/stbcx...
2022-09-04 Luke Kenneth Casso... brainmelt moment, added a comma into a comment in a...
2022-09-04 Luke Kenneth Casso... comments for 3-in 2-out ops
2022-09-04 Dmitry SelyutinRevert "target_addr in b and bc pseudo-code has no...
2022-09-04 Dmitry SelyutinRevert "svbranch.mdwn: replace target_addr with BD"
2022-09-04 Jacob Lifshayreallocate opcodes for ffadds (converted to X-FORM...
2022-09-03 Luke Kenneth Casso... Revert "add inv option to svshape2 (only 1 bit)"
2022-09-03 Luke Kenneth Casso... add inv option to svshape2 (only 1 bit)
2022-09-03 Luke Kenneth Casso... update sv_analysis to create separate SVMode.LDST_IDX...
2022-09-02 Luke Kenneth Casso... add test_caller_svshape2.py and make corrections to...
2022-09-02 Luke Kenneth Casso... add first svshape2 pseudocode, based on svindex
2022-09-02 Luke Kenneth Casso... whoops bit 25 is sk not vf in svshape2. matches with...
2022-09-02 Luke Kenneth Casso... add svshape2 (stub pseudocode) fields, Form, and CSV...
2022-09-02 Luke Kenneth Casso... add explicit 13 patterns for svshape which make a hole...
2022-09-01 Luke Kenneth Casso... ghostmansd found that extswsli is incorrectly declared
2022-09-01 Luke Kenneth Casso... missed rlwm* in conversion to RC_ONLY
2022-09-01 Luke Kenneth Casso... update CSV files marking those instructions that are...
2022-09-01 Dmitry Selyutinsvbranch.mdwn: replace target_addr with BD
2022-09-01 Jacob Lifshaymove fsins/fcoss to fptrans.mdwn -- they are transcende...
2022-08-31 Luke Kenneth Casso... target_addr in b and bc pseudo-code has no corresponding
2022-08-30 Dmitry Selyutinbcd.mdwn: fix cbcdtd operands
2022-08-30 Dmitry Selyutinbcd.mdwn: fix cdtbcd operands
2022-08-30 Dmitry Selyutinfixedlogical.mdwn: fix bpermd operands
2022-08-30 Luke Kenneth Casso... remove space from arguments in popcnt, should not have...
2022-08-30 Luke Kenneth Casso... correct the bitmanip pseudocode to remove spaces from...
2022-08-26 Luke Kenneth Casso... initialise overflow to zero in setvl, unconditionally.
2022-08-26 Luke Kenneth Casso... sigh, update setvl tests, to spec, and ISACaller
2022-08-26 Luke Kenneth Casso... add setvl unit tests for overflow condition.
2022-08-26 Luke Kenneth Casso... put back overflow in setvl, TODO actually set an overfl...
2022-08-26 Luke Kenneth Casso... okaaaay, long story. using GPR(_RT) <- something will...
2022-08-26 Luke Kenneth Casso... Revert "fix setvl. not setting CR0 properly"
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