test/ldst: add fixedsync tests for b/h/w/d ll/sc, but not quadword
[openpower-isa.git] / src / openpower / test /
2023-07-21 Konstantinos Marga... Moved maddsubrs/maddrs/msubrs instructions to separate...
2023-07-20 Jacob Lifshayadd much more exhaustive maddrs unit tests
2023-07-20 Jacob Lifshayadd much more exhaustive maddsubrs unit tests
2023-07-20 Jacob Lifshayformat code
2023-07-20 Jacob Lifshayadd byte reverse instructions from PowerISA v3.1B
2023-07-19 Konstantinos Marga... revert to correct value
2023-07-19 Konstantinos Marga... Unify XLEN =64 special case in the new code
2023-07-19 Jacob Lifshayadd fminmax tests with corresponding pseudocode fixes
2023-07-17 Jacob Lifshayupdate to use new fminmax instruction
2023-06-23 Jacob Lifshayrename fmv[ft]g*/fcvt[ft]g* to m[tf]fpr*/c[tf]fpr*
2023-06-17 Jacob Lifshayremove Rc=1 from fmvfg[s]
2023-06-16 Jacob Lifshayadd sv.fmv/sv.fcvt tests
2023-06-16 Jacob Lifshayadd fmvfg[s] and fmvtg[s][.] tests
2023-06-14 Jacob Lifshaydeepcopy is really slow and unnecessary here
2023-06-14 Jacob Lifshayspeed up StateSPRs.__init__
2023-06-14 Jacob Lifshaycache FPSCR computation since it's slow
2023-06-13 Jacob LifshayMerge branch 'pytest7'
2023-06-10 Jacob LifshayRevert "disable fmv / fcvt unit tests as there are...
2023-06-02 Dmitry Selyutinpysvp64asm: integrate into insndb
2023-06-01 Luke Kenneth Casso... disable fmv / fcvt unit tests as there are such a vast...
2023-06-01 Jacob Lifshayadd expected values to source
2023-06-01 Jacob Lifshayadd worked-out svp64 16-bit maddsubrs test case
2023-05-31 Jacob Lifshayfcvtfg works!
2023-05-30 Jacob Lifshayadd support for checking sprs and msr in unit tests
2023-05-30 Jacob Lifshayuse a different default MSR value for unit tests since...
2023-05-27 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=1091
2023-05-24 Jacob Lifshaytest fcvttgo. with traps enabled
2023-05-24 Jacob Lifshaytest fcvttgo. with VE=1 too
2023-05-21 Luke Kenneth Casso... whitespace - bug in autopep8 which is dreadful
2023-05-20 Jacob Lifshaymust test fcvtfgs not fcvtfg for f32 test case
2023-05-20 Jacob Lifshayformat code
2023-05-19 Jacob Lifshayfix fptrans unit tests' CR1 expected values since we...
2023-05-19 Jacob Lifshayadd WIP fcvtfg unit tests
2023-05-19 Jacob Lifshayfix fcvttg FPSCR.FR computation
2023-05-19 Jacob Lifshayonly retrieve stack frames we need -- ~2x speed up...
2023-05-18 Jacob Lifshaytest fcvttgo. instead of fcvttg
2023-05-17 Jacob Lifshaytest all fp -> int conversion modes
2023-05-17 Jacob Lifshayadd support for setting initial FPSCR in unit tests
2023-05-17 Jacob Lifshayrename js_toint -> toint in preparation for adding...
2023-05-17 Jacob Lifshayexpand fcvttg js tests to also test conversion to u32...
2023-05-17 Jacob Lifshayrename js_toint32 -> js_toint in preparation for adding...
2023-05-16 Jacob Lifshayfcvttg*: test FPSCR output
2023-05-16 Jacob Lifshaymake mis-matched FPSCR errors much easier to read
2023-05-13 Jacob Lifshayignore FPSCR in fcvt js test
2023-05-13 Jacob Lifshayallow ignoring FPSCR in tests
2023-05-06 Luke Kenneth Casso... add FPSCR to Test API (ExpectedState, SimState). untested
2023-05-05 Jacob Lifshayadd initial fmv/fcvt tests, though they're broken due...
2023-05-04 Konstantinos Marga... merge maddrs/msubrs, unit tests changed accordingly
2023-05-04 Konstantinos Marga... Add 2 more instructions to help with 2-coeff butterfly
2023-05-04 Konstantinos Marga... Handle large 64-bit values, but only the low 64-bit...
2023-05-04 Konstantinos Marga... do proper rounding, no rounding for SH=0 (for now)...
2023-05-04 Konstantinos Marga... handle negatives correctly by adding sign bit to final...
2023-05-04 Konstantinos Marga... almost there, positive values work, negative values...
2023-05-04 Konstantinos Marga... WIP: maddsubrs initial approach
2023-05-04 Jacob Lifshayfix forgotten stuff from last commit
2023-05-04 Jacob Lifshaycomment fmin*/fmax* since they're being replaced with...
2023-04-28 Jacob Lifshayprefix-sum remap works!
2023-04-25 Jacob Lifshayreplace min/max[su][.] with minmax[.]
2023-04-18 Jacob Lifshayadd shaddw
2023-03-30 Jacob Lifshayfix broken test case
2023-03-30 Jacob Lifshayadd addex to simulator
2023-03-30 Jacob Lifshayswitch to testing Rc=1 variants
2023-03-30 Jacob Lifshayadd case_nego_
2023-03-30 Jacob Lifshayrename le -> lt since CR bits are lt, gt, eq, and so...
2023-03-29 Jacob Lifshayadd test cases for ca/ov outputs of a bunch of add...
2023-03-28 Jacob Lifshayadd check against PIA's output downloaded from ftp...
2023-01-23 Dmitry Selyutinsvp64_utf_8_validation.py: convert labels to addresses
2023-01-01 Cesar StraussHandle newer nMigen adding a "bench" top-level root...
2022-11-11 Jacob Lifshayadd maddedus
2022-11-11 Jacob Lifshayfix case_sv_bigint_shift_left_then_back
2022-11-01 Dmitry Selyutintests/bigint: provide shadd/shadduw tests
2022-10-29 Luke Kenneth Casso... add dsld. (Rc=1) test, make overflow acceptable to...
2022-10-28 Jacob Lifshayadd tests for carry/overflow calculation of addmeo...
2022-10-28 Jacob Lifshayformat code
2022-10-28 Luke Kenneth Casso... fix dsld pseudocode to use ROTL64 instead of ROTL128
2022-10-28 Luke Kenneth Casso... add test showing that dsld and dsrd are not quite inverses
2022-10-28 Jacob Lifshayfix bigint shift tests
2022-10-28 Luke Kenneth Casso... fix dsrd, ROTL128 use 128-n not 64-n,
2022-10-28 Luke Kenneth Casso... fix dsrd pseudocode for new 3-in 2-out
2022-10-28 Luke Kenneth Casso... sort out dsld pseudocode, creating mask is tricky
2022-10-28 Luke Kenneth Casso... redo the 3-in 1-out move of dsld/dsrd to EXT04 VA2...
2022-10-24 Luke Kenneth Casso... add maxs. combined with cmp capability
2022-10-22 Luke Kenneth Casso... argh, extremely annoying: 4-operand dsld/dsrd is not...
2022-10-22 Luke Kenneth Casso... remove redundant case_dsrd3
2022-10-22 Luke Kenneth Casso... bigint shuffle
2022-10-18 Jacob Lifshayadd test for scalar sv.maddedu
2022-10-12 Luke Kenneth Casso... add sv.divmod2du test, inverse of the sv.madded
2022-10-12 Luke Kenneth Casso... comments clean-up on bigint big-mul case
2022-10-08 Luke Kenneth Casso... add elwidth overrides on destination (write) in ISACaller.
2022-10-08 Luke Kenneth Casso... split out base,offset in register decoding for elwidth...
2022-10-08 Luke Kenneth Casso... add 8-bit elwidth alu svp64 case
2022-10-02 Luke Kenneth Casso... remove complaints about standard Cray-style Vectors...
2022-10-01 Jacob Lifshayincrease pcdec. output compression by skipping impossib...
2022-09-30 Jacob Lifshayprefix codes tests pass
2022-09-30 Jacob Lifshayrewrite pcdec. pseudocode to work better for JPEG
2022-09-30 Jacob Lifshayadd lookup table generation for JPEG decode
2022-09-29 Jacob Lifshayconvert svp64 bigint unittests to use TestAccumulatorBase
2022-09-29 Luke Kenneth Casso... destination for maddedu and divmod2du for RS defaults...
2022-09-29 Jacob Lifshayrename madded->maddedu for consistency with PowerISA...
2022-09-29 Jacob Lifshayrename divrem2du->divmod2du for consistency with PowerI...
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