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Allow the formal engine to perform a same-cycle result in the ALU
[soc.git]
/
src
/
soc
/
bus
/
simple_gpio.py
2020-09-05
Luke Kenneth Casso...
add simple GPIO wishbone bus to litex sim.py
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2020-09-05
Luke Kenneth Casso...
move wb read/write to separate util test library and...
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2020-09-05
Luke Kenneth Casso...
add simple wishbone GPIO peripheral
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projects / soc.git / history