Send a one-clock "go" pulse after a configurable number of cycles
[soc.git] / src / soc / experiment / compalu_multi.py
2020-05-29 Cesar StraussSend a one-clock "go" pulse after a configurable number...
2020-05-28 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-05-28 Luke Kenneth Casso... add quick test of 3-operand DummyALU in MultiCompALU
2020-05-28 Luke Kenneth Casso... debugging test_alu_compunit.py
2020-05-28 Cesar StraussCheck that rd rises after issue_i, unless it's immediate
2020-05-28 Cesar StraussStore and present parameters together with issue_i
2020-05-27 Cesar StraussMove test case parameters to an "operation" member...
2020-05-27 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org...
2020-05-27 Cesar StraussRemove the monitor process
2020-05-25 Cesar StraussCheck that busy_o doesn't rise on its own
2020-05-25 Cesar StraussImplement the issue_i/busy_o protocol check.
2020-05-25 Cesar StraussMove process list to CompUnitParallelTest
2020-05-25 Luke Kenneth Casso... update comments on compalu_multi.py
2020-05-25 Luke Kenneth Casso... add some more stub comments
2020-05-25 Luke Kenneth Casso... yield blank so test passes
2020-05-25 Luke Kenneth Casso... add stubs
2020-05-25 Luke Kenneth Casso... add comments
2020-05-25 Cesar StraussFix detection of busy_o inside the monitor process
2020-05-25 Cesar StraussProof of concept of a parallel test
2020-05-25 Luke Kenneth Casso... must not do rd-req checking when both imm and zero...
2020-05-25 Luke Kenneth Casso... comment out invalid test
2020-05-25 Luke Kenneth Casso... lots of greater than 80 chars
2020-05-25 Luke Kenneth Casso... switch out req rel if immediate enabled
2020-05-25 Cesar StraussShow oper_r and oper_i in the signal list, in simulation
2020-05-24 Luke Kenneth Casso... spelling
2020-05-24 Luke Kenneth Casso... spelling
2020-05-24 Cesar StraussAvoid overwriting the first vcd file with the second one
2020-05-24 Cesar StraussRename the internal DFF of latchregisters to avoid...
2020-05-24 Luke Kenneth Casso... move docstring to wiki for compunit
2020-05-23 Cesar StraussAdd a few test cases with zero_a set, in combination...
2020-05-23 Cesar StraussAllow zero_a to be set when simulating an operation
2020-05-23 Luke Kenneth Casso... common function for op zero and op immed
2020-05-23 Cesar StraussChoose between RA (src1) and zero immediate, conditione...
2020-05-23 Luke Kenneth Casso... add comments
2020-05-23 Luke Kenneth Casso... split out RegSpecs into separate module
2020-05-23 Luke Kenneth Casso... split out RegSpec API into separate class (TODO: move...
2020-05-23 Luke Kenneth Casso... add notes on FunctionUnit API
2020-05-23 Luke Kenneth Casso... make MultiCompUnit and testing ALU use regspec API...
2020-05-23 Luke Kenneth Casso... make demo/test ALU look like nmigen pipeline API
2020-05-23 Luke Kenneth Casso... add link to regspecs on wiki
2020-05-23 Luke Kenneth Casso... add regspec capability to MultiCompUnit
2020-05-23 Luke Kenneth Casso... make immediate-or-RA selection optional based on awaren...
2020-05-23 Luke Kenneth Casso... start to morph MultiCompUnit to take "regspec" as the...
2020-05-22 Luke Kenneth Casso... update comments for ALUCompUnit
2020-05-21 Luke Kenneth Casso... document subkls in CompUnitRecord
2020-05-21 Luke Kenneth Casso... code-morph LDSTCompUnit to use RecordObject structure...
2020-05-21 Cesar StraussFixed typo and left-over from refactoring
2020-05-20 Luke Kenneth Casso... convert CompUnit to use CompUnitRecord
2020-05-20 Luke Kenneth Casso... fix a series of random imports
2020-04-23 Luke Kenneth Casso... comment req_done
2020-04-23 Luke Kenneth Casso... hair-raising series of half-way-house changes which...
2020-04-23 Luke Kenneth Casso... rename MultiCompUnit
2020-04-22 Luke Kenneth Casso... fix request-done in compalu_multi
2020-04-22 Luke Kenneth Casso... convert CompALU to Record in/out
2020-04-19 Luke Kenneth Casso... get compldst.py unit test up and running after modifica...
2020-04-19 Luke Kenneth Casso... whoops cut/paste error, n_src used instead of n_dst...
2020-04-18 Luke Kenneth Casso... 1st operation successful, 2nd still not running correctly
2020-04-18 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-04-17 Luke Kenneth Casso... whoops not using CompUnitMulti
2020-04-17 Luke Kenneth Casso... create distinct "done_o" signal
2020-04-17 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org...
2020-04-16 Luke Kenneth Casso... combine read and rd_rel to get faster response for...
2020-04-16 Luke Kenneth Casso... add experimental multi-rd/wr comp unit