get rid of rst
[soc.git] / src / soc / experiment /
2020-09-14 Luke Kenneth Casso... get rid of rst
2020-09-14 Luke Kenneth Casso... use word_select
2020-09-14 Luke Kenneth Casso... add mmu-dcache test
2020-09-14 Cole Poiriericache.py connect up all the sub-functions, fix typos...
2020-09-14 Cole Poiriericache.py add parameters to 'process' functions, fix...
2020-09-13 Cole Poiriericache.py move get/read/write functions out of ICache...
2020-09-13 Cole Poiriericache.py copy simulation code from dcache.py, fix...
2020-09-13 Cole Poiriericache.py fix syntax, move all constants and Array...
2020-09-13 Cole Poiriericache.py fix syntax errors that occured when running...
2020-09-13 Luke Kenneth Casso... dcache truncate wishbone address, store real_addr in...
2020-09-13 Luke Kenneth Casso... last mmu get seems ok
2020-09-13 Luke Kenneth Casso... whoops recursion error v.shift calculated from v.shift
2020-09-13 Luke Kenneth Casso... more experimenting with mmu READ_WAIT state
2020-09-13 Luke Kenneth Casso... radix tree wait error, investigating
2020-09-13 Luke Kenneth Casso... mmu test starting to make sense
2020-09-13 Luke Kenneth Casso... floundering around with MMU unit test, no idea what...
2020-09-13 Luke Kenneth Casso... mmu code-morph
2020-09-13 Luke Kenneth Casso... code-morph, add masked function
2020-09-13 Luke Kenneth Casso... move code to mmu_0
2020-09-13 Luke Kenneth Casso... add example radix walk from power-gem5
2020-09-13 Luke Kenneth Casso... MMU test
2020-09-13 Luke Kenneth Casso... sort out ariane PLRU, rename/clarify
2020-09-13 Luke Kenneth Casso... minor error in plru
2020-09-13 Luke Kenneth Casso... rename cache_valid_bits to cache_validsg
2020-09-13 Luke Kenneth Casso... cache_valid_idx too large in dcache
2020-09-13 Luke Kenneth Casso... whoops, cache valid array too small in dcache
2020-09-12 Luke Kenneth Casso... more dcache debugging
2020-09-12 Luke Kenneth Casso... missing reservation address comparison
2020-09-12 Luke Kenneth Casso... dcache tidyup
2020-09-12 Luke Kenneth Casso... more dcache debugging
2020-09-12 Luke Kenneth Casso... add random dcache mem test
2020-09-12 Luke Kenneth Casso... cache valid corrupted: fixed
2020-09-12 Luke Kenneth Casso... adding names to array signals
2020-09-12 Luke Kenneth Casso... whoops, indentation error
2020-09-12 Luke Kenneth Casso... enable Display debugs
2020-09-12 Luke Kenneth Casso... set bytesel in dcache store
2020-09-11 Luke Kenneth Casso... separat stbs_done into ld/st
2020-09-11 Luke Kenneth Casso... dcache load/store test
2020-09-11 Luke Kenneth Casso... debugging dcache
2020-09-11 Luke Kenneth Casso... wrong width for data / addr
2020-09-11 Luke Kenneth Casso... connect up WB SRAM to dcache test
2020-09-11 Luke Kenneth Casso... start on dcache test
2020-09-11 Luke Kenneth Casso... missing comb +=
2020-09-11 Luke Kenneth Casso... missing maybe_tlb_plrus
2020-09-11 Luke Kenneth Casso... WAY_BITS not TLB_WAY_BITS
2020-09-11 Luke Kenneth Casso... whoops new node not to be calculated at end
2020-09-11 Luke Kenneth Casso... try to get better DTLBUpdate
2020-09-11 Luke Kenneth Casso... simplify dcache pending
2020-09-11 Luke Kenneth Casso... move dcache pending test to separate module
2020-09-11 Luke Kenneth Casso... more error correction in dcache
2020-09-11 Luke Kenneth Casso... use module for TLBUpdate
2020-09-11 Luke Kenneth Casso... add brackets round if & in dcache
2020-09-11 Cole Poiriericache.py add test_icache and icache_sim derived from...
2020-09-11 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-09-11 Cole Poiriericache.py fix spelling, syntax
2020-09-10 Luke Kenneth Casso... simplify read/write pte
2020-09-10 Luke Kenneth Casso... eek, big sort-out of syntax errors in dcache.py, now...
2020-09-10 Cole Poiriericache.py rearrange the code within the base class...
2020-09-10 Luke Kenneth Casso... starting on dcache syntax errors
2020-09-10 Luke Kenneth Casso... add PLRU microwatt conversion
2020-09-10 Luke Kenneth Casso... add function calls to construct dcache
2020-09-10 Luke Kenneth Casso... correct some errors introduced in dcache.py
2020-09-09 Luke Kenneth Casso... more laborious line-by-line checking of dcache.py conve...
2020-09-09 Cole Poiriericache.py complete first translation pass of icache...
2020-09-07 Cole Poiriericache.py commit translation progress, about one third...
2020-09-07 Luke Kenneth Casso... bit of a big reorg of data structures
2020-09-07 Luke Kenneth Casso... large stack of moving stuff around in dcache
2020-09-07 Luke Kenneth Casso... adjust indentation of dcache_slow
2020-09-07 Luke Kenneth Casso... more dcache translation
2020-09-07 Luke Kenneth Casso... add start on cache_ram.vhdl to nmigen conversion
2020-09-07 Luke Kenneth Casso... more dcache translation
2020-09-03 Luke Kenneth Casso... do more on dcache conversion
2020-09-02 Luke Kenneth Casso... sign-extend lhax needs 16-64, separate from lwax which...
2020-08-30 Luke Kenneth Casso... working on dcache.py
2020-08-30 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-30 Cole Poiriericache.py commit progress, about a third through the...
2020-08-29 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-29 Cole Poiriermmu.py, dcache.py, mem_types.py change types capitaliza...
2020-08-29 Cole Poiriermem_types add more types from common.vhdl specifially...
2020-08-29 Cole Poiriermem_types.py arrange in alphabetical order for ease...
2020-08-29 Cole Poiriermmu.py remove duplicate comment left over from mmu...
2020-08-29 Cole Poiriericache.py initial commit of first attempt at translatio...
2020-08-29 Cesar StraussMove new write_gtkw and its example to nmutil
2020-08-28 Cole Poirierdcache.py add first attempt at translation of dcache_tb...
2020-08-27 Cole Poirierdcache.py add skeleton sim and test adapted from mmu...
2020-08-27 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-27 Cole Poirierdcache.py implement the remaining vhdl generate stateme...
2020-08-26 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-26 Cole Poirierdcache.py replace subtypes/types/constant aliases with...
2020-08-25 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc
2020-08-25 Cole Poirierdcache.py rearrange, transform classes into functions...
2020-08-25 Cole Poirierdcache.py fix whitespace, fomatting, syntax
2020-08-25 Cole Poirierdcache.py fix formatting
2020-08-25 Cole Poirierdcache.py move Reservation RecordObject to top of file
2020-08-25 Cole Poirierdcache.py move RegStage1 RecordObject to top of file
2020-08-25 Cole Poirierdcache.py move MemAccessRequest RecordObject to top...
2020-08-25 Cole Poirierdcache.py move Stage0 RecordObject to top of file
2020-08-24 Tobias PlatenTestCachedMemoryPortInterface cleanup
2020-08-24 Luke Kenneth Casso... fix *another* ld-update-related timing / FSM issue
2020-08-24 Luke Kenneth Casso... tidyup / shuffle after review
next