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set up LoadStore1 in ConfigMemoryPortInterface and hook it up in MMU
[soc.git]
/
src
/
soc
/
fu
/
mmu
/
test
/
test_pipe_caller.py
2021-04-30
Luke Kenneth Casso...
set up LoadStore1 in ConfigMemoryPortInterface and...
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2021-04-23
Luke Kenneth Casso...
move MMU Testcase to openpower.test
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2021-04-23
Luke Kenneth Casso...
import from openpower.endian
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2021-04-23
Luke Kenneth Casso...
use openpower.test.common
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2021-04-23
Luke Kenneth Casso...
more openpower-isa conversion
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2021-04-23
Luke Kenneth Casso...
move over to from openpower imports
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2021-01-07
Tobias Platen
set initial_sprs, cleanup mfspr testprog
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2021-01-07
Tobias Platen
mfspr is RT, SPR
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2021-01-06
Tobias Platen
first testcase for mmu: case_mfspr_after_invalid_load
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2020-11-17
Tobias Platen
testcase for dcbz
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2020-11-11
Tobias Platen
dcbz and tlbie first test, still incomplete
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2020-11-11
Tobias Platen
fu/mmu/test/test_pipe_caller.py test case for mfspr
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2020-11-08
Tobias Platen
mmu fsm testcase: add check_fsm_outputs based on functi...
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2020-11-08
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-11-08
Tobias Platen
mmu/fsm: test case for mtspr
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2020-11-04
Tobias Platen
MMU: begin test case for 'dcbz'
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2020-11-03
Tobias Platen
fix broken unittest after installing power-instruction...
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2020-10-20
Tobias Platen
s/alu/fsm/g
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2020-10-20
Tobias Platen
test case for FSMMMUStage
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2020-10-08
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2020-10-08
Tobias Platen
add WIP test_pipe_caller.py for mmu
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