2021-03-25 |
Tobias Platen | radixmmu.py: cleanup, documentation |
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2021-03-25 |
Tobias Platen | fix _get_prtable_addr, cleanup |
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2021-03-24 |
Luke Kenneth Casso... | comment about using PriorityEncoder |
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2021-03-24 |
Luke Kenneth Casso... | debug output |
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2021-03-24 |
Luke Kenneth Casso... | add comment skipping in pagereader.py |
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2021-03-24 |
Luke Kenneth Casso... | make svp64 isa caller unit tests more obvious |
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2021-03-24 |
Luke Kenneth Casso... | add option to stop writing isa all.py in pseudocode... |
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2021-03-24 |
Luke Kenneth Casso... | fix nonzero test in ISACaller RADIXMMU |
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2021-03-23 |
Tobias Platen | make addrshift human readable |
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2021-03-23 |
Tobias Platen | add addrshift function (based on microwatt) |
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2021-03-22 |
Luke Kenneth Casso... | do not set sv_changed |
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2021-03-22 |
Tobias Platen | testcase for _get_pgtable_addr |
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2021-03-22 |
Luke Kenneth Casso... | read predicate mask from correct point in SVP64Asm |
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2021-03-22 |
Luke Kenneth Casso... | add SVP64Asm option for "m=" to set both src and dest... |
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2021-03-22 |
Luke Kenneth Casso... | add very small dff sram variant (no 4k SRAMs) |
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2021-03-22 |
Cesar Strauss | Add test cases for integer VCOMPRESS and VEXPAND |
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2021-03-22 |
Luke Kenneth Casso... | make sure non-svp64-mode works |
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2021-03-22 |
Luke Kenneth Casso... | have get_predint return indicator that mask is all 1s |
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2021-03-22 |
Cesar Strauss | Skip fetching integer predicate mask when register... |
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2021-03-22 |
Cesar Strauss | Add traces for the new FSM and integer predicate decoding |
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2021-03-22 |
Cesar Strauss | Decode and fetch integer predicate registers |
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2021-03-21 |
Cesar Strauss | Fix typo |
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2021-03-21 |
Cesar Strauss | Add unique name to decoded predication signals |
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2021-03-21 |
Cesar Strauss | Revert removal of *.value from Enums |
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2021-03-21 |
Cesar Strauss | Fix syntax |
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2021-03-21 |
Luke Kenneth Casso... | more TODO comments |
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2021-03-21 |
Luke Kenneth Casso... | add for-loop pseudocode for CR predicate mask reading |
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2021-03-21 |
Luke Kenneth Casso... | code comments in TestIssuer |
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2021-03-21 |
Luke Kenneth Casso... | adjust syntax of SVP64 predicate test cas |
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2021-03-21 |
Luke Kenneth Casso... | naah. back to "sv." syntax for SVP64 assembly |
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2021-03-21 |
Cesar Strauss | Start work on the predicate fetch FSM |
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2021-03-21 |
Cesar Strauss | Add predication test case, initially disabled |
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2021-03-21 |
Luke Kenneth Casso... | add override for build commands powerpc64-linux-gnu... |
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2021-03-21 |
Luke Kenneth Casso... | enable -mregnames in assembly syntax for unit tests |
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2021-03-20 |
Luke Kenneth Casso... | more pseudocode in TestIssuer |
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2021-03-20 |
Luke Kenneth Casso... | move radixmmu to unit test format |
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2021-03-20 |
Luke Kenneth Casso... | add harmless code and commented-out pseudocode for... |
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2021-03-20 |
Luke Kenneth Casso... | sort out predicate zeroing in ISACaller |
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2021-03-20 |
Luke Kenneth Casso... | attempting to add src/dest-zeroing to ISACaller |
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2021-03-19 |
Luke Kenneth Casso... | more comments for TestIssuer when adding predication |
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2021-03-19 |
Tobias Platen | testcase for _get_pgtable_addr |
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2021-03-19 |
Luke Kenneth Casso... | decode predicate src/dest zeroing in SVP64RMModeDecode |
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2021-03-19 |
Luke Kenneth Casso... | comments for TestIssuer get_predint and get_predcr |
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2021-03-19 |
Luke Kenneth Casso... | add more pieces of predication reading puzzle to TestIssuer |
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2021-03-19 |
Luke Kenneth Casso... | cleanup TestIssuer (comments) |
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2021-03-19 |
Luke Kenneth Casso... | spelling |
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2021-03-19 |
Luke Kenneth Casso... | code-shuffle in TestIssuer, split out setting up periph... |
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2021-03-19 |
Luke Kenneth Casso... | move duplicated code to a function in TestIssuer |
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2021-03-18 |
Luke Kenneth Casso... | more hint/comments |
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2021-03-18 |
Luke Kenneth Casso... | comments / code-shuffle |
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2021-03-18 |
Luke Kenneth Casso... | update TestIssuer comments |
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2021-03-18 |
Luke Kenneth Casso... | add comments on most likely place to put predicate... |
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2021-03-18 |
Luke Kenneth Casso... | comments TestIssuer, add a stub FSM |
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2021-03-18 |
Luke Kenneth Casso... | add MSR PR read in RADIXMMU ISACaller |
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2021-03-18 |
Luke Kenneth Casso... | re-add auto-generated file simplev.py to gitignore |
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2021-03-18 |
Luke Kenneth Casso... | experiment in radixmmu with returning addr_next (and... |
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2021-03-18 |
Luke Kenneth Casso... | add sv_out2 to PowerDecode and PowerDecoder2 |
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2021-03-18 |
Luke Kenneth Casso... | cross-reference to bug #619 |
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2021-03-18 |
Luke Kenneth Casso... | add auto-generation of out2 column in SVP64RM |
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2021-03-18 |
Luke Kenneth Casso... | add option to move RS in CSV file reading, for compatib... |
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2021-03-17 |
Luke Kenneth Casso... | correct comments |
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2021-03-17 |
Luke Kenneth Casso... | re-enable SVP64 ISACaller predicate tests |
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2021-03-17 |
Luke Kenneth Casso... | add ascii graphic for extsw svp64 operation |
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2021-03-17 |
Luke Kenneth Casso... | add more explanatory comments |
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2021-03-17 |
Luke Kenneth Casso... | add twin-predicated extsw SVP64 ISACaller unit test |
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2021-03-17 |
Luke Kenneth Casso... | add SVP64 dststep incrementing in PowerDecoder2, Testis... |
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2021-03-17 |
Luke Kenneth Casso... | add CR-based predication to ISACaller |
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2021-03-17 |
Tobias Platen | cleanup raduxmmu._walk_tree |
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2021-03-17 |
Tobias Platen | create iterative mmu lookup loop |
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2021-03-17 |
Luke Kenneth Casso... | add SVP64 INT-style predication to ISACaller |
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2021-03-17 |
Luke Kenneth Casso... | add predication SVP64 unit test |
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2021-03-17 |
Luke Kenneth Casso... | add predication read ports (CR and INT) |
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2021-03-17 |
Luke Kenneth Casso... | whoops shift has to be done at same bitwidth |
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2021-03-17 |
Luke Kenneth Casso... | split out new_lookup function |
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2021-03-17 |
Luke Kenneth Casso... | link up SVP64 RM Mode decoding into PowerDecoder2 |
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2021-03-17 |
Luke Kenneth Casso... | add priv and mode to RADIXMMU |
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2021-03-17 |
Luke Kenneth Casso... | add instr_fetch mode to ISACaller Mem and RADIXMMU |
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2021-03-17 |
Luke Kenneth Casso... | whitespace |
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2021-03-17 |
Luke Kenneth Casso... | add in SVP64 RM Mode decoder |
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2021-03-16 |
Tobias Platen | radixmmu: detect badtree |
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2021-03-16 |
Tobias Platen | add valid, leaf to loop |
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2021-03-16 |
Cesar Strauss | Use symbolic values for subfields and bits |
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2021-03-16 |
Cesar Strauss | Add subfield and bit definitions for the SVP64 RM mode... |
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2021-03-16 |
Cesar Strauss | Define and initialise the mode variable, to be used... |
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2021-03-16 |
Cesar Strauss | Rename class so it does not clash with the enum |
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2021-03-15 |
Cesar Strauss | Fix import |
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2021-03-15 |
Tobias Platen | add rpte bitfields valid and leaf |
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2021-03-14 |
Luke Kenneth Casso... | remove "sv." and replace with "sv" in all SVP64Asm |
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2021-03-14 |
Luke Kenneth Casso... | remove "sv." and replace with "sv" in all SVP64Asm |
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2021-03-14 |
Cesar Strauss | Activate the VL==0 loop with any SVP64 prefix whatsoever |
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2021-03-13 |
Luke Kenneth Casso... | add setvl unit test assertions, add 2nd test |
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2021-03-13 |
Luke Kenneth Casso... | get first revision setvl operational in ISACaller |
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2021-03-13 |
Luke Kenneth Casso... | add setvl-to-long converter in SVP64Asm (sigh) |
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2021-03-13 |
Luke Kenneth Casso... | add setvl unit test |
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2021-03-13 |
Luke Kenneth Casso... | include SVSTATE in namespace, passing to ISACaller |
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2021-03-12 |
Jacob Lifshay | add setvl to decoder |
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2021-03-12 |
Jacob Lifshay | autoformat code |
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2021-03-12 |
Luke Kenneth Casso... | add OP_SETVL to MicrOp in power_enums.py |
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2021-03-12 |
Luke Kenneth Casso... | add ability to set and distinguish RT=0 (RT_OR_ZERO... |
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2021-03-12 |
Luke Kenneth Casso... | use PowerDecoder2.loop_continue instead of no_out_vec |
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