Nicolai Hähnle [Fri, 28 Oct 2016 19:31:27 +0000 (21:31 +0200)]
radeonsi: use VS prolog and epilog for monolithic shaders
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 19:24:35 +0000 (21:24 +0200)]
radeonsi: extract si_build_vs_{prolog,epilog}_function
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 13:38:47 +0000 (15:38 +0200)]
radeonsi: use PS prolog for monolithic shaders
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 13:36:43 +0000 (15:36 +0200)]
radeonsi: set num_input_vgprs for fragment shaders in create_function
So that the prolog generated for monolithic fragment shaders will have the
right signature.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 12:57:27 +0000 (14:57 +0200)]
radeonsi: extract si_build_ps_prolog_function
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 12:45:59 +0000 (14:45 +0200)]
radeonsi: use PS epilog for monolithic shaders
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 27 Oct 2016 16:48:16 +0000 (18:48 +0200)]
radeonsi: extract si_build_ps_epilog_function
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 27 Oct 2016 16:57:34 +0000 (18:57 +0200)]
radeonsi: pass the function name to si_llvm_create_func
We will use multiple functions in one module, so they should have
different names.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 27 Oct 2016 15:33:22 +0000 (17:33 +0200)]
radeonsi: split is_monolithic into no_prolog and no_epilog
This helps to achieve a gradual transition towards building monolithic shaders
via inlining.
no_prolog and no_epilog will be removed by the end of the series,
separate_prolog remains in use to control the PS input mapping.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 27 Oct 2016 15:22:10 +0000 (17:22 +0200)]
radeonsi: free data structures when shader compiles fail
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 27 Oct 2016 15:21:25 +0000 (17:21 +0200)]
radeonsi: move main TGSI translation into its own function
The idea is that adding prolog and epilog code will be pulled out into the
caller.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 12:42:46 +0000 (14:42 +0200)]
radeonsi: add always-inline pass to si_llvm_finalize_module
Change the pass manager as well, since this is a module-level pass. No
noticeable run-time difference on shader-db.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 31 Oct 2016 10:36:35 +0000 (11:36 +0100)]
radeonsi: fix signature of export intrinsic in VS epilog
The incompatible signature becomes an issue when the VS epilog gets merged
with the main vertex shader at the IR level.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 12:41:10 +0000 (14:41 +0200)]
radeonsi: link against amd_common
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 28 Oct 2016 12:40:24 +0000 (14:40 +0200)]
amd/common: add ac_is_sgpr_param helper
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 31 Oct 2016 10:56:09 +0000 (11:56 +0100)]
amd/common: build also for gallium drivers
At least when LLVM is used, which is basically always (unless you're only
building r600 without OpenCL).
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 27 Oct 2016 14:48:42 +0000 (16:48 +0200)]
amd/common: move llvm helper prototype to ac_llvm_util.h
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 31 Oct 2016 13:03:10 +0000 (14:03 +0100)]
glsl: fix lowering of UBO references of named blocks
When a UBO reference has the form block_name.foo where block_name refers
to a block where the first member has a non-zero offset, the base offset
was incorrectly added to the reference.
Fixes an assertion triggered in debug builds by
GL45-CTS.enhanced_layouts.uniform_block_layout_qualifier_conflict. That test
doesn't properly check for correct execution in this case, so I am also
going to send out a piglit test.
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Wed, 2 Nov 2016 20:35:30 +0000 (13:35 -0700)]
glsl: Update deref types when resizing implicitly sized arrays.
At link time, we resolve the size of implicitly sized arrays.
When doing so, we update the type of the ir_variables. However,
we neglected to update the type of ir_dereference nodes which
reference those variables.
It turns out array_resize_visitor (for GS/TCS/TES interface array
handling) already did 2/3 of the cases for this, so we can simply
refactor the code and reuse it.
This fixes:
GL45-CTS.shader_storage_buffer_object.basic-syntax
GL45-CTS.shader_storage_buffer_object.basic-syntaxSSO
which have an SSBO containing an implicitly sized array, followed
by some other members. setup_buffer_access uses the dereference
types to compute offsets to fields, and it had a stale type where
the implicitly sized array's length was still 0 instead of the
actual length.
While we're here, we can also fix update_array_sizes to properly
update deref types as well, fixing a FINISHME from 2010.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Timothy Arceri [Tue, 1 Nov 2016 22:49:58 +0000 (09:49 +1100)]
mesa/glsl: delete previously linked shaders earlier when linking
This moves the delete linked shaders call to
_mesa_clear_shader_program_data() which makes sure we delete them
before returning due to any validation problems.
It also reduces some code duplication.
From the OpenGL 4.5 Core spec:
"If LinkProgram failed, any information about a previous link of
that program object is lost. Thus, a failed link does not restore
the old state of program.
...
If one of these commands is called with a program for which
LinkProgram failed, no error is generated unless otherwise noted.
Implementations may return information on variables and interface
blocks that would have been active had the program been linked
successfully. In cases where the link failed because the program
required too many resources, these commands may help applications
determine why limits were exceeded."
Therefore it's expected that we shouldn't be able to query the
program that failed to link and retrieve information about a
previously successful link.
Before this change the linker was doing validation before freeing
the previously linked shaders and therefore could exit on failure
before they were freed.
This change also fixes an issue in compat profile where a program
with no shaders attached is expect to fall back to fixed function
but was instead trying to relink IR from a previous link.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97715
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Timothy Arceri [Wed, 2 Nov 2016 22:18:19 +0000 (09:18 +1100)]
nir: fix nir_shader_clone() and nir_sweep()
These were broken in
e1af20f18a8 when the info field in nir_shader was
turned into a pointer.
Clone was copying the pointer rather than the data and nir_sweep was
cleaning up shader_info rather than claiming it.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Wed, 2 Nov 2016 22:18:18 +0000 (09:18 +1100)]
mesa: move shader_info to the start of gl_program
This will allow use to use ralloc_parent() on the info field and fix
a regression in nir_sweep() caused by
e1af20f18a8.
This is intended to be a temporary requirement that will be removed
when we finish separating shader_info from nir_shader.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Wed, 2 Nov 2016 22:18:17 +0000 (09:18 +1100)]
st/mesa/r200/i915/i965: use rzalloc() to create gl_program
This allows us to use ralloc_parent() to see which data structure owns
shader_info which allows us to fix a regression in nir_sweep().
This will also allow us to move some fields from gl_linked_shader to
gl_program, which will allow us to do some clean-ups like storing
gl_program directly in the CurrentProgram array in gl_pipeline_object
enabling some small validation optimisations at draw time.
Also it is error prone to depend on the gl_linked_shader for
programs in current use because a failed linking attempt will free
infomation about the current program. In i965 we could be trying
to recompile a shader variant but may have lost some required fields.
Reviewed-by: Eric Anholt <eric@anholt.net>
Samuel Pitoiset [Wed, 26 Oct 2016 22:08:30 +0000 (00:08 +0200)]
nv50,nvc0: stop limiting the number of active queries to 1
This limitation was initially here because AMD_performance_monitor
doesn't allow to expose the real number of hardware counters. But
this actually really annoying when profiling with qapitrace.
Anyways, performance counters are mostly for developers and
failures are expected if you try to monitor more queries than
supported.
This breaks amd_performance_monitor_measure but it's expected.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Wed, 2 Nov 2016 22:50:03 +0000 (23:50 +0100)]
nvc0: add new warp_nonpred_execution_efficiency metric on SM35
Event not_predicated_off_thread_inst_executed is SM35+.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 1 Nov 2016 18:34:44 +0000 (19:34 +0100)]
nvc0: add missing metric-issue_slot on SM35
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 1 Nov 2016 18:19:15 +0000 (19:19 +0100)]
nvc0: do not expose metric-inst_issued twice on SM35
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Wed, 2 Nov 2016 22:57:25 +0000 (23:57 +0100)]
nvc0: add new warp_execution_efficiency metric on SM30+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 1 Nov 2016 18:23:21 +0000 (19:23 +0100)]
nvc0: respect 80-chars for perf metrics descriptions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 1 Nov 2016 18:22:37 +0000 (19:22 +0100)]
nvc0: sort performance metrics alphabetically
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Fredrik Höglund [Thu, 27 Oct 2016 01:02:14 +0000 (03:02 +0200)]
radv: add support for anisotropic filtering on VI+
Ported from radeonsi.
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 2 Nov 2016 00:33:33 +0000 (00:33 +0000)]
radv: fix dual source blending
Dolphin tried to use this, but we hadn't had any tests for it properly.
All that is required is the shader output format needs to be set
for 0 and 1 exports.
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Wed, 8 Jun 2016 19:18:36 +0000 (21:18 +0200)]
nv50: add missing draw_calls_indexed driver stat
Spotted when glancing at the VBO push code.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Adam Jackson [Wed, 14 Sep 2016 18:02:56 +0000 (14:02 -0400)]
glx/glvnd: Use bsearch() in FindGLXFunction instead of open-coding it
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Wed, 14 Sep 2016 18:01:13 +0000 (14:01 -0400)]
glx/glvnd: Fix dispatch function names and indices
As this array was not actually sorted, FindGLXFunction's binary search
would only sometimes work.
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Wed, 14 Sep 2016 17:56:50 +0000 (13:56 -0400)]
glx/glvnd: Don't modify the dummy slot in the dispatch table
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Jason Ekstrand [Tue, 1 Nov 2016 22:10:29 +0000 (15:10 -0700)]
anv/pipeline: Properly cache prog_data::param
Before we were caching the prog data but we weren't doing anything with
brw_stage_prog_data::param so anything with push constants wasn't getting
cached properly. This commit fixes that.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 1 Nov 2016 23:03:12 +0000 (16:03 -0700)]
anv/pipeline: Put actual pointers in anv_shader_bin
While we can simply calculate offsets to get to things such as the
prog_data and the key, it's much more user-friendly if there are just
pointers. Also, it's a bit more fool-proof.
While we're at it, we rework the pipeline cache API to use the
brw_stage_prog_data type directly.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 1 Nov 2016 21:16:34 +0000 (14:16 -0700)]
intel/blorp: Pass a brw_stage_prog_data to upload_shader
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 1 Nov 2016 21:03:43 +0000 (14:03 -0700)]
intel/blorp: Use wm_prog_data instead of hand-rolling our own
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 2 Nov 2016 00:51:56 +0000 (17:51 -0700)]
anv: Better handle return codes from anv_physical_device_init
The case where we just want the loop to continue is INCOMPATIBLE_DRIVER
because that simply means that whatever FD we opened isn't a supported
Intel chip. Other error codes such as OUT_OF_HOST_MEMORY are actual errors
and we should be returning early in that case.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 2 Nov 2016 00:18:30 +0000 (17:18 -0700)]
vulkan/wsi/x11: Clean up connections in finish_wsi
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 2 Nov 2016 00:16:14 +0000 (17:16 -0700)]
vulkan/wsi/x11: Better handle wsi_x11_connection_create failure
Without this fix, the function would still end up returning NULL but it
would put that NULL connection in the hash table which would be bad.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Chih-Wei Huang [Fri, 28 Oct 2016 09:54:17 +0000 (17:54 +0800)]
android: avoid using libdrm with host modules
Note LOCAL_CFLAGS and LOCAL_SHARED_LIBRARIES in Android.common.mk
are used by both host and target modules. However, commit
112e988
moved libdrm related flags to common. It causes the errors like:
error: 'out/host/linux-x86/obj32/SHARED_LIBRARIES/libdrm_intermediates/export_includes',
needed by 'out/host/linux-x86/obj32/EXECUTABLES/mesa_gen_matypes_intermediates/import_includes',
missing and no known rule to make it
No reason to use libdrm with host modules.
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Fixes: 112e988329b ("Android: move libdrm settings to top-level
Android.common.mk")
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Nicolai Hähnle [Wed, 19 Oct 2016 17:43:39 +0000 (19:43 +0200)]
glsl: compute lvalues of [in]out parameters before inlined function body
This is required when an out argument involves an array index that is either
a global variable modified by the function or another out argument in the
same function call.
Fixes the shaders/out-parameter-indexing/vs-inout-index-inout-* tests.
v2:
- modify the ir_dereference_array nodes in place
- use ir_hierarchical_visitor
v3: use base_ir (Ian Romanick)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Nicolai Hähnle [Thu, 27 Oct 2016 08:59:37 +0000 (10:59 +0200)]
radeonsi: fix BFE/BFI lowering for GLSL semantics
Fixes spec/arb_gpu_shader5/execution/built-in-functions/*-bitfield{Extract,Insert}
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 27 Oct 2016 08:32:27 +0000 (10:32 +0200)]
tgsi: align the definition of BFI & [UI]BFE with GLSL
As previously written, these opcodes use the SM5 semantics which is
incompatible with GLSL when bits == 0, offset == 32.
At some point we may want to add BFI_SM5 etc. opcodes, but all users
currently either want (and expect!) the GLSL semantics or don't care.
Bitfield inserts are generated by the GLSL lower_instructions and
lower_packing_builtins passes with constant bits and offset arguments,
so any workaround code that drivers may have to emit to follow GLSL
semantics should be optimized away easily for those uses.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Dave Airlie [Tue, 1 Nov 2016 23:51:43 +0000 (23:51 +0000)]
radv: expose xlib platform extension
I missed this when I added the xlib code, this allows
dolphin emu to start and crash later.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Lionel Landwerlin [Fri, 14 Oct 2016 23:27:06 +0000 (00:27 +0100)]
intel: aubinator: print field values if available
Turning this :
sampler state 0
Sampler Disable: false
Texture Border Color Mode: 0
LOD PreClamp Enable: 1
Base Mip Level: 0.000000
Mip Mode Filter: 0
Mag Mode Filter: 1
Min Mode Filter: 1
Texture LOD Bias: foo
Anisotropic Algorithm: 0
into this :
sampler state 0
Sampler Disable: false
Texture Border Color Mode: 0 (DX10/OGL)
LOD PreClamp Enable: 1 (OGL)
Base Mip Level: 0.000000
Mip Mode Filter: 0 (NONE)
Mag Mode Filter: 1 (LINEAR)
Min Mode Filter: 1 (LINEAR)
Texture LOD Bias: foo
Anisotropic Algorithm: 0 (LEGACY)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota<sirisha.gandikota@intel.com>
Lionel Landwerlin [Fri, 14 Oct 2016 23:16:25 +0000 (00:16 +0100)]
intel: aubinator: load fields values from xml data
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota<sirisha.gandikota@intel.com>
Lionel Landwerlin [Fri, 14 Oct 2016 16:04:50 +0000 (17:04 +0100)]
intel: aubinator: print boolean fields to true with colors
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sirisha Gandikota<sirisha.gandikota@intel.com>
Marek Olšák [Fri, 28 Oct 2016 00:32:51 +0000 (02:32 +0200)]
amd: fix a typo in PIXEL_PIPE_STAT_RESET definition
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 23:13:30 +0000 (01:13 +0200)]
gallium/radeon: add enum radeon_micro_mode
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 22:14:16 +0000 (00:14 +0200)]
gallium/radeon: make it clear that DRM 2.x.x fast clear constraint is CIK-only
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 11:47:11 +0000 (13:47 +0200)]
gallium/radeon: remove r600_surface::level_info
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 11:42:28 +0000 (13:42 +0200)]
gallium/radeon: add radeon_surf::is_linear
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 16:48:36 +0000 (18:48 +0200)]
gallium/radeon: remove radeon_surf_level::pitch_bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 16:12:07 +0000 (18:12 +0200)]
gallium/radeon: don't call u_format helpers if we have that info already
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 15:43:19 +0000 (17:43 +0200)]
gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levels
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 27 Oct 2016 23:55:17 +0000 (01:55 +0200)]
radeonsi: add a driver query for counting CP DMA calls
CP DMA calls are synchronous with regard to shaders, but can be made
asynchronous if needed.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 11 Feb 2016 23:58:46 +0000 (00:58 +0100)]
radeonsi: add a driver query for shader cache hits
This is an 8-month old patch.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 27 Oct 2016 15:41:55 +0000 (17:41 +0200)]
gbm: set up the interop extension for egl/drm
breaking libgbm -> libEGL ABI?
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Samuel Pitoiset [Mon, 31 Oct 2016 13:54:12 +0000 (14:54 +0100)]
nvc0: do not duplicate similar performance metrics
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
Emil Velikov [Tue, 1 Nov 2016 16:09:13 +0000 (16:09 +0000)]
docs: add news item and link release notes for 13.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Tue, 1 Nov 2016 16:05:32 +0000 (16:05 +0000)]
docs: add sha256 checksums for 13.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
405dd26860719d800ed6134f8f985f1525f25502)
Emil Velikov [Tue, 1 Nov 2016 15:55:24 +0000 (15:55 +0000)]
docs: Update 13.0.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
df1b0a5a86bab8cd138f504942198a300753b005)
Jason Ekstrand [Mon, 31 Oct 2016 23:33:43 +0000 (16:33 -0700)]
anv/device: Return DEVICE_LOST if execbuf2 fails
This makes more sense than OUT_OF_HOST_MEMORY. Technically, you can
recover from a failed execbuf2 but the batch you just submitted didn't
fully execute so things are in an ill-defined state. The app doesn't want
to continue from that point anyway.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Antia Puentes [Fri, 21 Oct 2016 09:40:11 +0000 (11:40 +0200)]
i965/gen8: Fix vertex attrib upload for dvec3/4 shader inputs
The emission of vertex attributes corresponding to dvec3 and dvec4
vertex shader input variables was not correct when the <size> passed
to the VertexAttribL* commands was <= 2.
This was because we were using the vertex array size when emitting vertices
to decide if we uploaded a 64-bit floating point attribute as 1 slot (128-bits)
for sizes 1 and 2, or 2 slots (256-bits) for sizes 3 and 4. This caused problems
when mapping the input variables to registers because, for deciding which
registers contain the values uploaded for a certain variable, we use the size
and type given to the variable in the shader, so we will be assigning 256-bits
to dvec3/4 variables, even if we only uploaded 128-bits for them, which happened
when the vertex array size was <= 2.
The patch uses the shader information to only emit as 128-bits those 64-bit floating
point variables that were declared as double or dvec2 in the vertex shader. Dvec3 and
dvec4 variables will be always uploaded as 256-bits, independently of the <size> given
to the VertexAttribL* command.
From the ARB_vertex_attrib_64bit specification:
"For the 64-bit double precision types listed in Table X.1, no default
attribute values are provided if the values of the vertex attribute variable
are specified with fewer components than required for the attribute
variable. For example, the fourth component of a variable of type dvec4
will be undefined if specified using VertexAttribL3dv or using a vertex
array specified with VertexAttribLPointer and a size of three."
We are filling these unspecified components with zeros, which coincidentally is
also what the GL44-CTS.vertex_attrib_binding.basic-inputL-case1 expects.
v2: Do not use bitcount (Kenneth Graunke)
Fixes: GL44-CTS.vertex_attrib_binding.basic-inputL-case1 test
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97287
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Dave Airlie [Tue, 1 Nov 2016 05:11:35 +0000 (15:11 +1000)]
radv: drop some unused cmask info members.
These were assigned but never used.
Inspired by similiar patch in radeonsi.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Lionel Landwerlin [Tue, 25 Oct 2016 11:49:53 +0000 (12:49 +0100)]
intel: aubinator: fix printing missing gen option
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Lionel Landwerlin [Tue, 25 Oct 2016 11:49:52 +0000 (12:49 +0100)]
intel: aubinator: fix assumptions on amount of required data
We require 12 bytes of headers but in some cases we just need 4.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Lionel Landwerlin [Tue, 25 Oct 2016 11:49:51 +0000 (12:49 +0100)]
intel: aubinator: don't print out blocks twice
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Nanley Chery [Fri, 30 Sep 2016 23:28:53 +0000 (16:28 -0700)]
i965: Move gen8_disable_stages to brw_upload_initial_gpu_state
3DSTATE_WM_CHROMAKEY isn't programmed anywhere else.
3DSTATE_WM_HZ_OP is programmed, then cleared by blorp during a
HZ op, so repeatedly clearing it after every blorp execution is
redundant.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Nanley Chery [Fri, 30 Sep 2016 22:26:19 +0000 (15:26 -0700)]
i965: Program 3DSTATE_AA_LINE_PARAMETERS in upload_invariant_state
This packet is non-pipelined and doesn't ever change across emissions.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Leo Liu [Mon, 24 Oct 2016 18:03:11 +0000 (14:03 -0400)]
st/omx/dec: disable tunnel for size different case
When the video coded size is different from frame size, we need the result
buffers are same as coded size, which are not size compatible with encode
required size, so that simply use no tunnel for this case instead of frame
by frame converting.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Leo Liu [Mon, 24 Oct 2016 18:03:10 +0000 (14:03 -0400)]
st/omx/dec: result buffers size should match codec decoder size
Otherwise fails the check of matching between decoder size and buffers
size in kernel.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
George Kyriazis [Thu, 20 Oct 2016 16:39:51 +0000 (11:39 -0500)]
swr: [rasterizer] added EventHandlerFile contructor
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
George Kyriazis [Wed, 19 Oct 2016 21:37:36 +0000 (16:37 -0500)]
swr: [rasterizer core] Frontend dependency work
Add frontend dependency concept in the DRAW_CONTEXT, which
allows serialization of frontend work if necessary.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
George Kyriazis [Tue, 18 Oct 2016 20:42:33 +0000 (15:42 -0500)]
swr: [rasterizer core] Refactor/cleanup backends
Used for common code reuse and simplification
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
George Kyriazis [Mon, 17 Oct 2016 23:46:35 +0000 (18:46 -0500)]
swr: [rasterizer core] Remove deprecated simd intrinsics
Used in abandoned all-or-nothing approach to converting to AVX512
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
George Kyriazis [Sat, 15 Oct 2016 22:35:26 +0000 (17:35 -0500)]
swr: [rasterizer archrast] Add thread tags to event files.
This allows the post-processor to easily detect the API thread and to
process frame information. The frame information is needed to
optimized how data is processed from worker threads.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Marek Olšák [Fri, 7 Oct 2016 20:26:58 +0000 (22:26 +0200)]
glsl: use a non-malloc'd storage for short ir_variable names
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:57:04 +0000 (20:57 +0200)]
glsl: use the linear allocator in opt_constant_propagation
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:57:04 +0000 (20:57 +0200)]
glsl: use the linear allocator in opt_copy_propagation
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:57:04 +0000 (20:57 +0200)]
glsl: use the linear allocator in opt_copy_propagation_elements
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:57:04 +0000 (20:57 +0200)]
glsl: use the linear allocator in opt_dead_code_local
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 18:41:10 +0000 (20:41 +0200)]
glsl: use the linear allocator in glsl_symbol_table
no ralloc_free occurences
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 17:17:15 +0000 (19:17 +0200)]
glsl: use the linear allocator for ast_node and derived classes
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 15:37:04 +0000 (17:37 +0200)]
glsl/lexer: use the linear allocator
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 02:49:13 +0000 (04:49 +0200)]
glcpp: use the linear allocator for most objects
v2: cosmetic changes
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Marek Olšák [Fri, 7 Oct 2016 02:44:05 +0000 (04:44 +0200)]
ralloc: add a linear allocator as a child node of ralloc
v2: remove goto, cosmetic changes
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 6 Oct 2016 22:51:41 +0000 (00:51 +0200)]
ralloc: remove memset from ralloc_size
only do it in rzalloc_size as it was supposed to be
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Marek Olšák [Thu, 6 Oct 2016 22:34:26 +0000 (00:34 +0200)]
ralloc: use rzalloc where it's necessary
No change in behavior. ralloc_size is equivalent to rzalloc_size.
That will change though.
Calls not switched to rzalloc_size:
- ralloc_vasprintf
- glsl_type::name allocation (it's filled with snprintf)
- C++ classes where valgrind didn't show uninitialized values
I switched most of non-glsl stuff to rzalloc without checking whether
it's really needed.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 7 Oct 2016 00:16:12 +0000 (02:16 +0200)]
ralloc: add DECLARE_RZALLOC_CXX_OPERATORS
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whiteacpe.org>
Juha-Pekka Heikkila [Tue, 11 Oct 2016 10:54:58 +0000 (13:54 +0300)]
nir: zero allocated memory where needed
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Juha-Pekka Heikkila [Tue, 11 Oct 2016 10:48:16 +0000 (13:48 +0300)]
i965/fs: fill allocated memory with zeros where needed
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Juha-Pekka Heikkila [Tue, 14 Jun 2016 14:59:04 +0000 (17:59 +0300)]
i965/vec4: zero allocated memory where needed
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Tapani Pälli [Thu, 13 Oct 2016 11:54:30 +0000 (14:54 +0300)]
glsl/glcpp: initialize all fields of glcpp_parser_t on creation
this fixes some of the regressions with
"ralloc: remove memset from ralloc_size"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Juha-Pekka Heikkila [Thu, 13 Oct 2016 10:43:29 +0000 (13:43 +0300)]
glsl: Fix reading of uninitialized memory
Switch to use memory allocations which zero memory for places
where needed.
v2: modify and rebase on top of Marek's series (Tapani)
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Fri, 7 Oct 2016 16:34:13 +0000 (18:34 +0200)]
glsl: initialize glsl_struct_field properly
don't rely on ralloc doing memset
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whiteacpe.org>