2020-05-13 |
Michael Nolan | Modify alu test to put reg1 *OR* reg3 into alu input A |
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2020-05-13 |
Michael Nolan | Update TODO |
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2020-05-13 |
Luke Kenneth... | remove operand c from ALU in/out |
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2020-05-12 |
Luke Kenneth... | temporary reorg of reg/immediate reading |
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2020-05-12 |
Luke Kenneth... | add 3rd register input to ALUInputData |
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2020-05-12 |
Luke Kenneth... | connect LDSTMulti to 6600 Scoreboard |
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2020-05-12 |
Luke Kenneth... | when doing LD-immediate only acknowledge register 1... |
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2020-05-12 |
Michael Nolan | Add new shift_rot FU for shifts and rotates |
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2020-05-12 |
Michael Nolan | Remove rotates and shifts from alu |
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2020-05-11 |
Michael Nolan | Massively spead up test_pipe_caller.py |
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2020-05-11 |
Michael Nolan | Revert "Greatly speed up test_pipe_caller.py" |
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2020-05-11 |
Michael Nolan | Greatly speed up test_pipe_caller.py |
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2020-05-11 |
Luke Kenneth... | comments from discussion |
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2020-05-11 |
Michael Nolan | Reverse bit order for cr0 in proof |
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2020-05-11 |
Michael Nolan | Check output of cr0 from alu |
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2020-05-11 |
Michael Nolan | Add carry in input to alu testbench |
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2020-05-11 |
Michael Nolan | Add ability to specify initial state for SPRs |
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2020-05-11 |
Michael Nolan | Fix proof_input_stage.py |
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2020-05-11 |
Michael Nolan | Fix rlwimi by reordering the inputs *again* |
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2020-05-11 |
Michael Nolan | Re-enable rlwinm test |
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2020-05-11 |
Michael Nolan | Check write register number too |
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2020-05-11 |
Michael Nolan | Reorder the register reads so the field in read_reg2... |
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2020-05-11 |
Michael Nolan | Have test_pipe_caller actually read from the registers... |
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2020-05-11 |
Michael Nolan | Actually implement rlwimi |
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2020-05-11 |
Luke Kenneth... | comment input signals |
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2020-05-11 |
Luke Kenneth... | cleanup rotator.py |
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2020-05-11 |
Luke Kenneth... | add docstring, missing return module |
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2020-05-11 |
Luke Kenneth... | start cleanup of rotator.py, Cat order is inverted |
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2020-05-11 |
Luke Kenneth... | convert microwatt rotator to nmigen (first draft) |
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2020-05-10 |
Michael Nolan | Add test for rlwnm |
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2020-05-10 |
Michael Nolan | Implement rlwimi as well |
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2020-05-10 |
Michael Nolan | Implement rlwinm in alu |
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2020-05-10 |
Michael Nolan | Add test for rlwinm |
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2020-05-10 |
Michael Nolan | Reduce BMC depth on proof_main_stage.py |
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2020-05-10 |
Luke Kenneth... | use temporary python vars rather than copy signals... |
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2020-05-09 |
Michael Nolan | Add shift left and shift right to main stage proof |
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2020-05-09 |
Luke Kenneth... | sigh ton of syntax errors |
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2020-05-09 |
Luke Kenneth... | bit of reorg, trick on add - put carry in into the LSB |
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2020-05-09 |
Luke Kenneth... | comment output stage |
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2020-05-09 |
Luke Kenneth... | comment maskgen |
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2020-05-09 |
Michael Nolan | Handle algebraic shifts too |
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2020-05-09 |
Michael Nolan | Implement logical shift right |
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2020-05-09 |
Michael Nolan | Add support for sld |
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2020-05-09 |
Michael Nolan | Change shift left to be implemented with rotate and... |
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2020-05-09 |
Michael Nolan | Add mask generator for shift class instructions |
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2020-05-09 |
Michael Nolan | Add shift left opcode to main_stage |
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2020-05-09 |
Michael Nolan | Fix broken mask when x == y |
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2020-05-09 |
Michael Nolan | Add right shift test to test_caller.py |
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2020-05-09 |
Michael Nolan | Add shift test to test_caller, fix fixedshift being... |
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2020-05-09 |
Michael Nolan | Fix helpers.py not playing nicely with selectableInts |
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2020-05-09 |
Michael Nolan | Add reversed add and subtract, as well as lshift and... |
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2020-05-09 |
Luke Kenneth... | comment where ALUIntermediateData to go |
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2020-05-09 |
Luke Kenneth... | TODO on AluIntermediateData |
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2020-05-09 |
Luke Kenneth... | missing sticky-overflow pass-through from middle stage |
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2020-05-09 |
Luke Kenneth... | pass through sticky-overflow |
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2020-05-09 |
Luke Kenneth... | remove unneeded class |
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2020-05-09 |
Luke Kenneth... | clarifying comments |
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2020-05-09 |
Michael Nolan | Minor cleanup |
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2020-05-09 |
Luke Kenneth... | preliminary test for LD/ST "update" mode working |
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2020-05-09 |
Luke Kenneth... | document PowerOp |
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2020-05-08 |
Luke Kenneth... | add comments |
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2020-05-08 |
Luke Kenneth... | add ALUFirstInputData |
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2020-05-08 |
Luke Kenneth... | send address to memory only for one cycle and acknowled... |
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2020-05-08 |
Luke Kenneth... | experimenting |
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2020-05-08 |
Luke Kenneth... | working indexed version of LD/ST CompUnit |
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2020-05-08 |
Luke Kenneth... | hmmm i think LD/ST Comp Unit might actually be working... |
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2020-05-08 |
Michael Nolan | Oops, forgot pipeline.py |
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2020-05-08 |
Michael Nolan | Add tests for immediates, add subf to tests |
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2020-05-08 |
Michael Nolan | Add comments about the purpose of each alu stage |
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2020-05-08 |
Michael Nolan | Add test for alu against simulator |
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2020-05-08 |
Michael Nolan | Add assertions for output stage cr0 |
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2020-05-08 |
Michael Nolan | Add output stage |
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2020-05-08 |
Michael Nolan | Add and or and xor to main_stage |
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2020-05-08 |
Michael Nolan | Add carry in and out |
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2020-05-08 |
Michael Nolan | Have input_stage set the b operand to imm_data if it... |
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2020-05-08 |
Michael Nolan | Add extra bits (carry, overflow, etc) to input and... |
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2020-05-08 |
Michael Nolan | Begin adding main ALU stage |
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2020-05-08 |
Michael Nolan | Convert alu to use the op in ctx |
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2020-05-08 |
Michael Nolan | Add FPPipeContext to alu pipe_data |
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2020-05-08 |
Luke Kenneth... | almost got LD/ST CompUnit working |
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2020-05-08 |
Luke Kenneth... | prototype LD/ST L0 cache/buffer was bouncing address... |
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2020-05-08 |
Michael Nolan | Add handling of A inversion and B input |
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2020-05-08 |
Michael Nolan | Begin adding input stage of alu |
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2020-05-08 |
Michael Nolan | Add pipe data for ALU pipeline |
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2020-05-08 |
Michael Nolan | Update gitignore in isa dir |
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2020-05-08 |
Michael Nolan | Separate out ALU Input record from alu_hier.py |
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2020-05-07 |
Michael Nolan | Add test_branch_loop_ctr |
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2020-05-07 |
Michael Nolan | Add tests for conditional branches |
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2020-05-07 |
Luke Kenneth... | move unused simulator code out the way |
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2020-05-07 |
Luke Kenneth... | testing LD without ST |
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2020-05-07 |
Michael Nolan | Ooops, forgot comparefixed.patch |
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2020-05-07 |
Michael Nolan | Get test_cmp working |
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2020-05-07 |
Michael Nolan | Fix test_mtcrf. Test has been verified against qemu |
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2020-05-07 |
Michael Nolan | Make FieldSelectableInt accept slices for set and get |
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2020-05-07 |
Michael Nolan | Add handling of add with comparison |
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2020-05-07 |
Michael Nolan | Fix bug with comparisons in selectable_int.py |
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2020-05-07 |
Michael Nolan | Add test_mfcr |
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2020-05-07 |
Luke Kenneth... | continuing debugging of LD/ST CompUnit FSM and unit... |
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2020-05-07 |
Luke Kenneth... | partially-debugged ld/st comp unit using new PortInterface |
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2020-05-06 |
Michael Nolan | Re-enable test_mtcrf |
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next |