2021-01-31 |
Luke Kenneth... | fix ISACaller unit test |
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2021-01-31 |
Tobias Platen | fix two syntax errors in src/soc/decoder/isa/caller.py |
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2021-01-31 |
Luke Kenneth... | SVP64 Remap Fields structures for ISACaller |
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2021-01-31 |
Luke Kenneth... | remove sv_rm from PowerDecoder register decoders |
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2021-01-31 |
Luke Kenneth... | add SVSTATE SPR sub-field accessor class to ISACaller |
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2021-01-31 |
Luke Kenneth... | move SVP64 Extra reg decoding into main PowerDecoder... |
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2021-01-31 |
Luke Kenneth... | update submodule |
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2021-01-30 |
Luke Kenneth... | move CR in/out SVP64 EXTRA decoders into PowerDecoder |
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2021-01-30 |
Luke Kenneth... | add SVP64 CR out extending to 7-bit in PowerDecoder2 |
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2021-01-30 |
Luke Kenneth... | add SVP64 CR EXTRA field-extension, from 3-bit to 7... |
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2021-01-30 |
Luke Kenneth... | extend CR registers in Decode2ToExecute1Type to 7 bit |
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2021-01-30 |
Luke Kenneth... | add SVP64CRExtra class to PowerDecoder2, turns 3-bit... |
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2021-01-30 |
Luke Kenneth... | split out SVEXTRA field selection/decoding into separat... |
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2021-01-30 |
Luke Kenneth... | whoops update PowerDecoder2 svp64 comments, reg sizes... |
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2021-01-30 |
Luke Kenneth... | add SVP64 EXTRA decoding to RB, RC and RT (out) in... |
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2021-01-30 |
Luke Kenneth... | add first SVP64 7-bit register context decoder to Power... |
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2021-01-29 |
Luke Kenneth... | add SVP64RM record to PowerDecoder2 |
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2021-01-29 |
Luke Kenneth... | increase register number sizes from 5 to 7 |
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2021-01-29 |
Luke Kenneth... | syntax corrections, also size of maxvl was wrong |
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2021-01-29 |
Luke Kenneth... | add SVP64 RM (Remap) Record |
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2021-01-29 |
Luke Kenneth... | adjust SVP64RM class to output more PowerDecoder-friend... |
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2021-01-29 |
Luke Kenneth... | adjust how register copy/setup is done in PowerDecoder2 |
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2021-01-29 |
Luke Kenneth... | add SV etype/ptype to power decoder |
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2021-01-29 |
Luke Kenneth... | whoops syntax error. submodule update |
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2021-01-29 |
Luke Kenneth... | start adding svp64 enums |
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2021-01-29 |
Luke Kenneth... | use new svp64-augmented csv reader in PowerDecoder |
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2021-01-29 |
Luke Kenneth... | whoops missed out "+" on explicit license listing |
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2021-01-28 |
Luke Kenneth... | add SVSTATE to StateRegs |
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2021-01-28 |
Luke Kenneth... | add SVState SPR Record, SVSTATERec |
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2021-01-28 |
Luke Kenneth... | add svp64 CR field identification for EXTRA2/3 decoding |
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2021-01-28 |
Luke Kenneth... | move svp64 reg-decode function to more appropriate... |
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2021-01-28 |
Luke Kenneth... | provide "merger" of SVP64 RM info into v3.0B CSV files |
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2021-01-27 |
Tobias Platen | use SPR constants |
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2021-01-27 |
Luke Kenneth... | move SVP64RM CSV class to new module |
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2021-01-27 |
Luke Kenneth... | whitespace and shortening of SPR MMU redirection in... |
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2021-01-27 |
Luke Kenneth... | also read LDST RM files |
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2021-01-26 |
Tobias Platen | [Bug 580] update comment above changed block |
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2021-01-26 |
Tobias Platen | [Bug 580] redirect MMU SPRs to the MMU |
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2021-01-25 |
Luke Kenneth... | extra comments in svp64 |
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2021-01-24 |
Luke Kenneth... | changing svp64 asm syntax to use / instead of . as... 24jan2021_ls180 |
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2021-01-23 |
Luke Kenneth... | move sanity-checks, add mode into svp64_rm |
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2021-01-23 |
Luke Kenneth... | cleanup on aisle 3 - simplify sv_mode svp64 |
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2021-01-23 |
Luke Kenneth... | check src/dest mask exist if zeroing, svp64 |
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2021-01-23 |
Luke Kenneth... | add predicate-result svp64 decoding |
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2021-01-23 |
Luke Kenneth... | add svp64 saturation decoding |
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2021-01-23 |
Luke Kenneth... | start decoding modes in svp64 |
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2021-01-23 |
Luke Kenneth... | and now for something completely different... |
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2021-01-23 |
Luke Kenneth... | add elwidth encoding svp64, add more debug-print |
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2021-01-23 |
Luke Kenneth... | add svp64 subvl encoding |
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2021-01-23 |
Luke Kenneth... | add in svp64 predicate mask encoding |
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2021-01-23 |
Luke Kenneth... | capture CR 3 and 5 bit sv encodings |
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2021-01-23 |
Luke Kenneth... | start decoding EXTRA2/3 |
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2021-01-23 |
Luke Kenneth... | start decoding sv EXTRAs and identifying them |
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2021-01-23 |
Luke Kenneth... | start to read RM CSV files |
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2021-01-23 |
Luke Kenneth... | add beginnings of svp64 assembly translator |
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2021-01-22 |
Luke Kenneth... | add example on how to access regs list for cmp |
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2021-01-19 |
Tobias Platen | test_issuer_mmu_data_path.py: test both ld and st instr... |
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2021-01-19 |
Tobias Platen | connect LDSTException to MMU and DCache |
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2021-01-19 |
Tobias Platen | connect wishbone bus to test memory |
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2021-01-18 |
Tobias Platen | uncomment #FIXME in unit_test |
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2021-01-18 |
Tobias Platen | fu/mmu/fsm.py: connect valid and load signals |
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2021-01-17 |
Tobias Platen | add test memory for simulation |
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2021-01-17 |
Tobias Platen | cleanup test_issuer_mmu_data_path.py |
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2021-01-16 |
Tobias Platen | clean up test case for tlbie and dcbz |
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2021-01-16 |
Tobias Platen | move microwatt_mmu bool variable to pspec |
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2021-01-16 |
Tobias Platen | add new unittest: test_issuer_mmu_data_path.py |
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2021-01-15 |
Tobias Platen | cleanup test_non_production_core.py |
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2021-01-15 |
Tobias Platen | add microwatt_mmu boolean variable to core and compunits |
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2021-01-15 |
Tobias Platen | test_non_production_core.py: fix hanging test |
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2021-01-15 |
Tobias Platen | test_non_production_core.py: wire instruction decoder... |
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2021-01-14 |
Tobias Platen | add test case for mmu+NonProductionCore |
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2021-01-10 |
Tobias Platen | add microwatt mmu config option to compunits.py |
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2021-01-08 |
Tobias Platen | fix broken testcase for simple core |
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2021-01-07 |
Tobias Platen | set initial_sprs, cleanup mfspr testprog |
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2021-01-07 |
Tobias Platen | mfspr is RT, SPR |
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2021-01-06 |
Tobias Platen | first testcase for mmu: case_mfspr_after_invalid_load |
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2021-01-06 |
Tobias Platen | fu/mmu/fsm.py: mfspr!=mtspr |
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2021-01-04 |
Tobias Platen | test_countzero.py: rename output files |
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2021-01-01 |
Cesar Strauss | Add zero CR test case and fix comments |
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2021-01-01 |
Cesar Strauss | Add test cases with rc=1 |
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2021-01-01 |
Cesar Strauss | Make all ports the same size, on the test ALU |
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2021-01-01 |
Cesar Strauss | Add CR output port to test cases |
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2021-01-01 |
Cesar Strauss | Add CR to the output data port |
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2021-01-01 |
Cesar Strauss | Make output write enables independent of valid_o |
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2021-01-01 |
Cesar Strauss | Move NOP test case earlier |
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2021-01-01 |
Cesar Strauss | Disable data value output on NOP |
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2021-01-01 |
Cesar Strauss | Add condition register (CR) output |
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2020-12-31 |
Cesar Strauss | Implement and test NOP in the test ALU |
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2020-12-31 |
Cesar Strauss | Don't use OP_NOP for zero-delay subtraction |
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2020-12-31 |
Cesar Strauss | Test first input port being masked out |
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2020-12-31 |
Cesar Strauss | Sign extend the second input port |
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2020-12-31 |
Cesar Strauss | Test masked-out second input port |
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2020-12-31 |
Cesar Strauss | Add sign extend to the Test ALU |
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2020-12-31 |
Cesar Strauss | Show rdmaskn and wrmask in GTKWave |
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2020-12-31 |
Cesar Strauss | Use the increment operator |
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2020-12-31 |
Cesar Strauss | Add support for masked write operations |
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2020-12-31 |
Cesar Strauss | Clarify reason for holding rdmaskn valid during the... |
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2020-12-31 |
Cesar Strauss | Remove previous version of the CompUnit parallel unit... |
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2020-12-31 |
Cesar Strauss | Only hold the decoder signals for one cycle, along... |
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2020-12-30 |
Cesar Strauss | Test the rdmaskn control signal |
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