2020-08-04 |
Luke Kenneth... | add DMI debug interface to libresoc litex sim |
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2020-08-04 |
Luke Kenneth... | single-step and print out PC using DMI in litex sim |
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2020-08-04 |
Luke Kenneth... | get litex sim to kick off a "STEP" via the DMI interfac... |
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2020-08-04 |
Luke Kenneth... | connect up a DMI FSM to litex sim |
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2020-08-04 |
Luke Kenneth... | more remove wildcard imports |
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2020-08-04 |
Luke Kenneth... | do not use wildcard imports |
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2020-08-04 |
Luke Kenneth... | adding litex sim experimentation. |
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2020-08-04 |
Samuel A. Falvo II | Remove XXX; this seems done otherwise. |
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2020-08-03 |
Luke Kenneth... | add quick demo/test of reading DMI reg 9 |
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2020-08-03 |
Luke Kenneth... | add extra port for debug read of int regs via DMI |
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2020-08-03 |
Luke Kenneth... | pass state (MSR/PC) around between PowerDecode2, DMI... |
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2020-08-03 |
Luke Kenneth... | https://bugs.libre-soc.org/show_bug.cgi?id=446 |
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2020-08-03 |
Luke Kenneth... | use new soc.config.state CoreState class in DMI and... |
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2020-08-03 |
Tobias Platen | LDSTSplitter: report exception |
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2020-08-03 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-08-03 |
Tobias Platen | TstDataMerger2 |
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2020-08-03 |
Luke Kenneth... | change over to DMI debug start/stop interface |
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2020-08-03 |
Luke Kenneth... | move debug to record |
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2020-08-03 |
Samuel A. Falvo II | WIP: check MB > ME and select mask appropriately |
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2020-08-02 |
Luke Kenneth... | convert microwatt core_debug.vhdl to nmigen |
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2020-08-02 |
Luke Kenneth... | add debug dir |
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2020-08-01 |
Luke Kenneth... | add quick test of litex bios IMM64 macro |
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2020-08-01 |
Luke Kenneth... | add rlwnm test showing that shift rot OP_RLC proof... |
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2020-08-01 |
Luke Kenneth... | line-length / whitespace |
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2020-08-01 |
Luke Kenneth... | expand out for-loop setting up input record subset |
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2020-07-31 |
Luke Kenneth... | reorg DecodeB in power_decoder2.py to sign-extend immed... |
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2020-07-31 |
Luke Kenneth... | add more instructions to litex trampoline test (not... |
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2020-07-31 |
Luke Kenneth... | restrict external port list further in test_issuer |
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2020-07-31 |
Luke Kenneth... | missed go_i/rel_o rename |
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2020-07-31 |
Samuel A. Falvo II | WIP: more debugging signals for inspection |
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2020-07-30 |
Samuel A. Falvo II | WIP: rlwinm/rlwnm/rlwimi-type proofs |
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2020-07-30 |
Tobias Platen | begin work on TestCase for two DataMergers/Cache |
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2020-07-30 |
Tobias Platen | add CacheRecord |
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2020-07-30 |
Luke Kenneth... | core_start/stop/endian were inverted (output) |
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2020-07-30 |
Luke Kenneth... | ha! have to explicitly specify the ports when writing... |
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2020-07-30 |
Luke Kenneth... | add trampoline test from litex |
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2020-07-30 |
Luke Kenneth... | set sel line in minerva instruction fetch |
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2020-07-30 |
Luke Kenneth... | ha! found source of XICS test bug: wishbone stb was... |
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2020-07-29 |
Luke Kenneth... | more exploratory testing of XICS, joining ICP and ICS... |
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2020-07-29 |
Tobias Platen | modified LDSTSplitter to conform to PortInterface |
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2020-07-29 |
Luke Kenneth... | forgot to rename ad/st in LDSTCompUnitRecord |
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2020-07-29 |
Luke Kenneth... | bit of a big change: add prefixes "cu_" to all CompUnit... |
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2020-07-29 |
Luke Kenneth... | start on test joining XICS ICS to ICP |
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2020-07-29 |
Luke Kenneth... | tidyup XICS, identify (potential?) bug? |
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2020-07-29 |
Luke Kenneth... | move CR test out of subtest indentation |
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2020-07-29 |
Luke Kenneth... | move SHIFTROT test out of subtest indentation |
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2020-07-29 |
Luke Kenneth... | move actual ALU test out of subTest indentation just... |
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2020-07-29 |
Luke Kenneth... | whitespace |
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2020-07-29 |
Jacob Lifshay | clean up branch test_pipe_caller |
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2020-07-29 |
Jacob Lifshay | clean up alu test_pipe_caller |
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2020-07-29 |
Jacob Lifshay | add __init__.py to all source directories |
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2020-07-29 |
Jacob Lifshay | clean up some tests |
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2020-07-29 |
Jacob Lifshay | format some tests |
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2020-07-29 |
Jacob Lifshay | add code for skipping test cases |
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2020-07-28 |
Jacob Lifshay | clean up div pipe tests to allow them to be run in... |
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2020-07-28 |
Jacob Lifshay | Merge remote-tracking branch 'origin/master' |
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2020-07-28 |
Jacob Lifshay | fix test_pipe_ilang.py |
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2020-07-28 |
Luke Kenneth... | use ctx.op compare (and muxid) in shiftrot proof |
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2020-07-28 |
Jacob Lifshay | split out ilang tests |
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2020-07-28 |
Jacob Lifshay | add more files to .gitignore |
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2020-07-28 |
Jacob Lifshay | format code |
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2020-07-28 |
Luke Kenneth... | add preliminary investigative test of XICS ICS |
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2020-07-28 |
Luke Kenneth... | tidyup/comments in trap proof |
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2020-07-27 |
Luke Kenneth... | add 2nd part of XICS interrupt interface |
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2020-07-27 |
Luke Kenneth... | fix trap proof, and trap main_stage, and pseudocode... |
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2020-07-27 |
Luke Kenneth... | shorten expected_ to exp_, gets line-length down |
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2020-07-26 |
Samuel A. Falvo II | MTMSR(D) properties. |
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2020-07-26 |
Luke Kenneth... | start on conversion of xics.vhdl to nmigen |
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2020-07-26 |
Luke Kenneth... | add nop test cases |
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2020-07-26 |
Luke Kenneth... | add test_nop general test case |
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2020-07-26 |
Luke Kenneth... | activate some of new accumulator-based tests in test_issuer |
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2020-07-26 |
Luke Kenneth... | do not need lod_l.q | lsto_l.q can just use lsd_l.q |
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2020-07-26 |
Luke Kenneth... | argh add yet another latch to detect when LD/ST has... |
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2020-07-26 |
Luke Kenneth... | sigh, issue with detection/waiting for LD/ST CompUnit |
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2020-07-26 |
Luke Kenneth... | convert LDST test to accumulator style |
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2020-07-26 |
Luke Kenneth... | convert Branch test to accumulator style |
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2020-07-26 |
Luke Kenneth... | convert SPR test to accumulator style |
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2020-07-26 |
Luke Kenneth... | convert TRAP test to accumulator style |
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2020-07-26 |
Luke Kenneth... | remove FHDLTestCase |
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2020-07-26 |
Luke Kenneth... | convert CR test to accumulator style |
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2020-07-26 |
Luke Kenneth... | convert mul test to accumulator style |
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2020-07-26 |
Luke Kenneth... | convert shift_rot test to new base accumulator style |
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2020-07-26 |
Luke Kenneth... | convert logical test case to new base class accumulator... |
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2020-07-26 |
Luke Kenneth... | move run_test_program to base class and rename to ... |
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2020-07-26 |
Luke Kenneth... | convert ALU to new accumulator style |
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2020-07-26 |
Luke Kenneth... | again, move large heavily-indented code-block in div... |
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2020-07-26 |
Luke Kenneth... | run subtest, indentation getting too large, move to... |
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2020-07-26 |
Luke Kenneth... | get div compunit test running (use new way to accumulat... |
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2020-07-26 |
Luke Kenneth... | use new test accumulator class in div tests |
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2020-07-26 |
Luke Kenneth... | add common test base class for "accumulating" tests... |
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2020-07-25 |
Luke Kenneth... | update submodule |
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2020-07-25 |
Luke Kenneth... | remove old div overflow test, keep microwatt version |
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2020-07-25 |
Luke Kenneth... | hilarious. only just caught a bug where overflow was... |
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2020-07-25 |
Luke Kenneth... | comb += missing |
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2020-07-25 |
Luke Kenneth... | add CR0 regression, expected 0b10 actual 0b11 |
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2020-07-25 |
Luke Kenneth... | add regression test 8, DivPipeCore producing spurious... |
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2020-07-25 |
Luke Kenneth... | add pia back in |
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2020-07-25 |
Luke Kenneth... | re-add pia_result_to_output function (minus "typing... |
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2020-07-25 |
Luke Kenneth... | add div compunit test |
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2020-07-25 |
Luke Kenneth... | wait until pipeline indicates that its output is valid... |
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next |