soc.git
2020-07-07 Luke Kenneth... remove unneeded record field from logical_input_record
2020-07-07 Luke Kenneth... debugging termination (OP_ATTN)
2020-07-07 Luke Kenneth... update opcode map for OP_ATTN
2020-07-07 Luke Kenneth... add halted condition in ISACaller, when attn instructio...
2020-07-07 Luke Kenneth... debugging termination / OP_ATTN
2020-07-07 Luke Kenneth... add ATTN unit test
2020-07-07 Luke Kenneth... add core start/stop capability, and OP_ATTN support
2020-07-07 Luke Kenneth... add in SPR test cases into test_issuer.py
2020-07-06 Luke Kenneth... use ComMULOpSubset in mul pipeline
2020-07-06 Luke Kenneth... remove alu unneeded op record data
2020-07-06 Luke Kenneth... remove alu unneeded op record data
2020-07-06 Luke Kenneth... remove alu unneeded op record data
2020-07-06 Luke Kenneth... add mul unit to test_issuer
2020-07-06 Luke Kenneth... add mul compunit
2020-07-06 Luke Kenneth... whoops forgot that the mul pipeline is actually a pipel...
2020-07-06 Luke Kenneth... do abs slightly differently in SelectableInt
2020-07-06 Luke Kenneth... continue mul unit test debugging
2020-07-06 Luke Kenneth... add MULS (signed) version of multiply
2020-07-06 Luke Kenneth... improve debug for test_sim.py
2020-07-06 Luke Kenneth... add mullw test to qemu sim
2020-07-06 Luke Kenneth... fix SelectableInt abs
2020-07-06 Luke Kenneth... add first simulator mul test
2020-07-06 Luke Kenneth... investigating mul pipeline
2020-07-06 Luke Kenneth... SelectableInt: make __mul__ return enough space to...
2020-07-06 Luke Kenneth... first cut at mul test pipeline
2020-07-06 Luke Kenneth... add first cut at fu mul pipeline
2020-07-06 Luke Kenneth... adding mtspr tests
2020-07-06 Luke Kenneth... adding OP_MTMSR test
2020-07-06 Luke Kenneth... add mtmsr internal op
2020-07-06 Luke Kenneth... add mtmsr internal op
2020-07-06 Luke Kenneth... sort out initialisation of TstL0CacheBuffer in ldst...
2020-07-06 Cesar StraussAssert n.ready_i at the beginning of the cycle
2020-07-06 Cesar StraussRemove wait state to demonstrate zero-delay reception.
2020-07-06 Cesar StraussSimplify waiting loops
2020-07-06 Cesar StraussFinally add some well needed comments
2020-07-06 Cesar StraussSimplify waiting loops
2020-07-06 Cesar StraussAdd some wait states in each process
2020-07-06 Cesar StraussNegate inputs after use
2020-07-06 Cesar StraussAdd other tests
2020-07-06 Cesar StraussImplement receiver
2020-07-06 Cesar StraussImplement sender.
2020-07-06 Cesar StraussBegin a new parallel test
2020-07-05 Luke Kenneth... add mtmsr tests (fail)
2020-07-05 Luke Kenneth... check trap compunit output properly
2020-07-05 Luke Kenneth... check msr in trap test, fix OP_RFID
2020-07-05 Luke Kenneth... add an illegal instruction trap test
2020-07-05 Luke Kenneth... set up a trap function for microcode override
2020-07-05 Luke Kenneth... big reorg on PowerDecoder2, actually Decode2Execute1Type
2020-07-05 Luke Kenneth... stop debug output in power_decoder
2020-07-05 Luke Kenneth... comments in power_regspec_map.py
2020-07-05 Luke Kenneth... comment on spr2, not needed
2020-07-05 Luke Kenneth... check xer_out not xer_in
2020-07-05 Luke Kenneth... split out Decode2ToExecuteType fields involving registers
2020-07-05 Luke Kenneth... sigh read and write xer detection, fix spr and trap...
2020-07-05 Luke Kenneth... check spr1 in test spr compunit
2020-07-05 Luke Kenneth... get/set slow spr in spr test_pipe_caller
2020-07-05 Luke Kenneth... add first spr compunit test (not working yet)
2020-07-05 Luke Kenneth... add SPR test case, commented out for now
2020-07-05 Luke Kenneth... move valid signal out of Decode2ToExecute1Type and...
2020-07-05 Luke Kenneth... add slow spr regfile regspec support
2020-07-05 Luke Kenneth... remap SPR PowerISA numbers to internal SPR enum
2020-07-05 Luke Kenneth... comment out SPR for now, needs SPR regfile
2020-07-05 Luke Kenneth... add SPR compunit
2020-07-05 Luke Kenneth... missing initialisation of disasm_start
2020-07-05 Luke Kenneth... check NIA on trap fu test
2020-07-05 Luke Kenneth... OP_RFID needs to read SRR0/1, OP_SC needs to write
2020-07-05 Luke Kenneth... fix qemu trap test
2020-07-04 Luke Kenneth... cater for illegal instruction (generates a trap)
2020-07-04 Luke Kenneth... add sc back in
2020-07-04 Luke Kenneth... comments in trap about exceptions using microcoding
2020-07-04 Luke Kenneth... add pspec to test_core.py
2020-07-04 Luke Kenneth... add pspec to test_core.py
2020-07-04 Luke Kenneth... more rename spr1/spr2 to fast1/fast2
2020-07-04 Luke Kenneth... whitespace
2020-07-04 Luke Kenneth... more updating spr1/spr2 to fast1/fast2
2020-07-04 Luke Kenneth... more updating spr1/spr2 to fast1/fast2
2020-07-04 Luke Kenneth... rename spr1/spr2 to fast1/fast2 in branch
2020-07-04 Luke Kenneth... update trap docstring
2020-07-04 Luke Kenneth... use new consts module
2020-07-04 Luke Kenneth... sorting out trap fastregs
2020-07-04 Luke Kenneth... sort out trap test reg checking
2020-07-04 Luke Kenneth... resolve spr names in ISACaller
2020-07-04 Luke Kenneth... rename spr1 to fast1 in trap data
2020-07-04 Luke Kenneth... sorting out fast/spr naming
2020-07-04 Luke Kenneth... oops initialise Function Unit class with idx
2020-07-04 Luke Kenneth... add first cookie-cut test_trap_compunit.py
2020-07-04 Luke Kenneth... add gitignores
2020-07-04 Luke Kenneth... debugging decoding of SPRs (fast)
2020-07-04 Luke Kenneth... add spr test, add decode of spr in/out
2020-07-04 Luke Kenneth... add spr main stage
2020-07-04 Luke Kenneth... add spr input record
2020-07-04 Luke Kenneth... add SPR pipeline
2020-07-04 Luke Kenneth... reduce steps per stage to 8
2020-07-03 Luke Kenneth... set only div/rem supported
2020-07-02 Luke Kenneth... allow flexible selection of the types of ALUs
2020-07-02 Luke Kenneth... fix unit tests due to change in using pspec
2020-07-02 Luke Kenneth... use Mock class (more convenient)
2020-07-02 Luke Kenneth... allow ALU names to propagate through from FU to CompUni...
2020-07-02 Luke Kenneth... name function unit ALUs
2020-07-02 Luke Kenneth... comment out DIV unit for now
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