src/ieee754/part/partsig.py

   1 # SPDX-License-Identifier: LGPL-2.1-or-later
   2 # See Notices.txt for copyright information
   3
   4 """
   5 Copyright (C) 2020 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
   6
   7 dynamic-partitionable class similar to Signal, which, when the partition
   8 is fully open will be identical to Signal.  when partitions are closed,
   9 the class turns into a SIMD variant of Signal.  *this is dynamic*.
  10
  11 the basic fundamental idea is: write code once, and if you want a SIMD
  12 version of it, use PartitionedSignal in place of Signal.  job done.
  13 this however requires the code to *not* be designed to use nmigen.If,
  14 nmigen.Case, or other constructs: only Mux and other logic.
  15
  16 * http://bugs.libre-riscv.org/show_bug.cgi?id=132
  17 """
  18
  19 from ieee754.part_mul_add.adder import PartitionedAdder
  20 from ieee754.part_cmp.eq_gt_ge import PartitionedEqGtGe
  21 from ieee754.part_shift.part_shift_dynamic import PartitionedDynamicShift
  22 from ieee754.part_shift.part_shift_scalar import PartitionedScalarShift
  23 from ieee754.part_mul_add.partpoints import make_partition, PartitionPoints
  24 from operator import or_, xor, and_, not_
  25
  26 from nmigen import (Signal, Const)
  27
  28
  29 def getsig(op1):
  30     if isinstance(op1, PartitionedSignal):
  31         op1 = op1.sig
  32     return op1
  33
  34
  35 def applyop(op1, op2, op):
  36     return op(getsig(op1), getsig(op2))
  37
  38
  39 class PartitionedSignal:
  40     def __init__(self, mask, *args, **kwargs):
  41         self.sig = Signal(*args, **kwargs)
  42         width = self.sig.shape()[0]  # get signal width
  43         # create partition points
  44         if isinstance(mask, PartitionPoints):
  45             self.partpoints = mask
  46         else:
  47             self.partpoints = make_partition(mask, width)
  48         self.modnames = {}
  49         for name in ['add', 'eq', 'gt', 'ge', 'ls']:
  50             self.modnames[name] = 0
  51
  52     def set_module(self, m):
  53         self.m = m
  54
  55     def get_modname(self, category):
  56         self.modnames[category] += 1
  57         return "%s_%d" % (category, self.modnames[category])
  58
  59     def eq(self, val):
  60         return self.sig.eq(getsig(val))
  61
  62     # unary ops that do not require partitioning
  63
  64     def __invert__(self):
  65         return ~self.sig
  66
  67     # unary ops that require partitioning
  68
  69     def __neg__(self):
  70         z = Const(0, len(self.partpoints)+1)
  71         result, _ = self.add_op(self, ~0, carry=z)  # TODO, subop
  72         return result
  73
  74     # binary ops that don't require partitioning
  75
  76     def __and__(self, other):
  77         return applyop(self, other, and_)
  78
  79     def __rand__(self, other):
  80         return applyop(other, self, and_)
  81
  82     def __or__(self, other):
  83         return applyop(self, other, or_)
  84
  85     def __ror__(self, other):
  86         return applyop(other, self, or_)
  87
  88     def __xor__(self, other):
  89         return applyop(self, other, xor)
  90
  91     def __rxor__(self, other):
  92         return applyop(other, self, xor)
  93
  94     # binary ops that need partitioning
  95
  96     # TODO: detect if the 2nd operand is a Const, a Signal or a
  97     # PartitionedSignal.  if it's a Const or a Signal, a global shift
  98     # can occur.  if it's a PartitionedSignal, that's much more interesting.
  99     def ls_op(self, op1, op2, carry, shr_flag=0):
 100         op1 = getsig(op1)
 101         if isinstance(op2, Const) or isinstance(op2, Signal):
 102             scalar = True
 103             shape = op1.shape()
 104             pa = PartitionedScalarShift(shape[0], self.partpoints)
 105         else:
 106             scalar = False
 107             op2 = getsig(op2)
 108             shape = op1.shape()
 109             pa = PartitionedDynamicShift(shape[0], self.partpoints)
 110         setattr(self.m.submodules, self.get_modname('ls'), pa)
 111         comb = self.m.d.comb
 112         if scalar:
 113             comb += pa.data.eq(op1)
 114             comb += pa.shifter.eq(op2)
 115             comb += pa.shift_right.eq(shr_flag)
 116         else:
 117             comb += pa.a.eq(op1)
 118             comb += pa.b.eq(op2)
 119             comb += pa.shift_right.eq(shr_flag)
 120         # XXX TODO: carry-in, carry-out
 121         #comb += pa.carry_in.eq(carry)
 122         return (pa.output, 0)
 123
 124     def __lshift__(self, other):
 125         z = Const(0, len(self.partpoints)+1)
 126         result, _ = self.ls_op(self, other, carry=z) # TODO, carry
 127         return result
 128
 129     def __rlshift__(self, other):
 130         raise NotImplementedError
 131         return Operator("<<", [other, self])
 132
 133     def __rshift__(self, other):
 134         z = Const(0, len(self.partpoints)+1)
 135         result, _ = self.ls_op(self, other, carry=z, shr_flag=1) # TODO, carry
 136         return result
 137
 138     def __rrshift__(self, other):
 139         raise NotImplementedError
 140         return Operator(">>", [other, self])
 141
 142     def add_op(self, op1, op2, carry):
 143         op1 = getsig(op1)
 144         op2 = getsig(op2)
 145         shape = op1.shape()
 146         pa = PartitionedAdder(shape[0], self.partpoints)
 147         setattr(self.m.submodules, self.get_modname('add'), pa)
 148         comb = self.m.d.comb
 149         comb += pa.a.eq(op1)
 150         comb += pa.b.eq(op2)
 151         comb += pa.carry_in.eq(carry)
 152         return (pa.output, pa.carry_out)
 153
 154     def sub_op(self, op1, op2, carry=~0):
 155         op1 = getsig(op1)
 156         op2 = getsig(op2)
 157         shape = op1.shape()
 158         pa = PartitionedAdder(shape[0], self.partpoints)
 159         setattr(self.m.submodules, self.get_modname('add'), pa)
 160         comb = self.m.d.comb
 161         comb += pa.a.eq(op1)
 162         comb += pa.b.eq(~op2)
 163         comb += pa.carry_in.eq(carry)
 164         return (pa.output, pa.carry_out)
 165
 166     def __add__(self, other):
 167         result, _ = self.add_op(self, other, carry=0)
 168         return result
 169
 170     def __radd__(self, other):
 171         result, _ = self.add_op(other, self)
 172         return result
 173
 174     def __sub__(self, other):
 175         result, _ = self.sub_op(self, other)
 176         return result
 177
 178     def __rsub__(self, other):
 179         result, _ = self.sub_op(other, self)
 180         return result
 181
 182     def __mul__(self, other):
 183         return Operator("*", [self, other])
 184
 185     def __rmul__(self, other):
 186         return Operator("*", [other, self])
 187
 188     def __check_divisor(self):
 189         width, signed = self.shape()
 190         if signed:
 191             # Python's division semantics and Verilog's division semantics
 192             # differ for negative divisors (Python uses div/mod, Verilog
 193             # uses quo/rem); for now, avoid the issue
 194             # completely by prohibiting such division operations.
 195             raise NotImplementedError(
 196                     "Division by a signed value is not supported")
 197
 198     def __mod__(self, other):
 199         raise NotImplementedError
 200         other = Value.cast(other)
 201         other.__check_divisor()
 202         return Operator("%", [self, other])
 203
 204     def __rmod__(self, other):
 205         raise NotImplementedError
 206         self.__check_divisor()
 207         return Operator("%", [other, self])
 208
 209     def __floordiv__(self, other):
 210         raise NotImplementedError
 211         other = Value.cast(other)
 212         other.__check_divisor()
 213         return Operator("//", [self, other])
 214
 215     def __rfloordiv__(self, other):
 216         raise NotImplementedError
 217         self.__check_divisor()
 218         return Operator("//", [other, self])
 219
 220     # binary comparison ops that need partitioning
 221
 222     def _compare(self, width, op1, op2, opname, optype):
 223         # print (opname, op1, op2)
 224         pa = PartitionedEqGtGe(width, self.partpoints)
 225         setattr(self.m.submodules, self.get_modname(opname), pa)
 226         comb = self.m.d.comb
 227         comb += pa.opcode.eq(optype)  # set opcode
 228         if isinstance(op1, PartitionedSignal):
 229             comb += pa.a.eq(op1.sig)
 230         else:
 231             comb += pa.a.eq(op1)
 232         if isinstance(op2, PartitionedSignal):
 233             comb += pa.b.eq(op2.sig)
 234         else:
 235             comb += pa.b.eq(op2)
 236         return pa.output
 237
 238     def __eq__(self, other):
 239         width = self.sig.shape()[0]
 240         return self._compare(width, self, other, "eq", PartitionedEqGtGe.EQ)
 241
 242     def __ne__(self, other):
 243         width = self.sig.shape()[0]
 244         eq = self._compare(width, self, other, "eq", PartitionedEqGtGe.EQ)
 245         ne = Signal(eq.width)
 246         self.m.d.comb += ne.eq(~eq)
 247         return ne
 248
 249     def __gt__(self, other):
 250         width = self.sig.shape()[0]
 251         return self._compare(width, self, other, "gt", PartitionedEqGtGe.GT)
 252
 253     def __lt__(self, other):
 254         width = self.sig.shape()[0]
 255         # swap operands, use gt to do lt
 256         return self._compare(width, other, self, "gt", PartitionedEqGtGe.GT)
 257
 258     def __ge__(self, other):
 259         width = self.sig.shape()[0]
 260         return self._compare(width, self, other, "ge", PartitionedEqGtGe.GE)
 261
 262     def __le__(self, other):
 263         width = self.sig.shape()[0]
 264         # swap operands, use ge to do le
 265         return self._compare(width, other, self, "ge", PartitionedEqGtGe.GE)
 266
 267     # useful operators
 268
 269     def bool(self):
 270         """Conversion to boolean.
 271
 272         Returns
 273         -------
 274         Value, out
 275             ``1`` if any bits are set, ``0`` otherwise.
 276         """
 277         raise NotImplementedError
 278         return Operator("b", [self])
 279
 280     def any(self):
 281         """Check if any bits are ``1``.
 282
 283         Returns
 284         -------
 285         Value, out
 286             ``1`` if any bits are set, ``0`` otherwise.
 287         """
 288         raise NotImplementedError
 289         return Operator("r|", [self])
 290
 291     def all(self):
 292         """Check if all bits are ``1``.
 293
 294         Returns
 295         -------
 296         Value, out
 297             ``1`` if all bits are set, ``0`` otherwise.
 298         """
 299         raise NotImplementedError
 300         return Operator("r&", [self])
 301
 302     def xor(self):
 303         """Compute pairwise exclusive-or of every bit.
 304
 305         Returns
 306         -------
 307         Value, out
 308             ``1`` if an odd number of bits are set, ``0`` if an
 309                   even number of bits are set.
 310         """
 311         # XXXX TODO: return partition-mask-sized set of bits
 312         raise NotImplementedError
 313         return Operator("r^", [self])
 314
 315     def implies(premise, conclusion):
 316         """Implication.
 317
 318         Returns
 319         -------
 320         Value, out
 321             ``0`` if ``premise`` is true and ``conclusion`` is not,
 322             ``1`` otherwise.
 323         """
 324         # amazingly, this should actually work.
 325         return ~premise | conclusion