src/spec/ls180.py

   1 #!/usr/bin/env python
   2 # see https://bugs.libre-soc.org/show_bug.cgi?id=304
   3
   4 from spec.base import PinSpec
   5
   6 from spec.ifaceprint import display, display_fns, check_functions
   7 from spec.ifaceprint import display_fixed
   8 from collections import OrderedDict
   9
  10 def pinspec():
  11     pinbanks = OrderedDict((
  12         ('N', (32, 2)),
  13         ('E', (32, 2)),
  14         ('S', (32, 2)),
  15         ('W', (32, 2)),
  16     ))
  17     fixedpins = {
  18         'CTRL_SYS': [
  19             'TEST',
  20             'JTAG_SEL',
  21             'UBOOT_SEL',
  22             'NMI#',
  23             'RESET#',
  24             'CLK24M_IN',
  25             'CLK24M_OUT',
  26             'PLLTEST',
  27             'PLLREGIO',
  28             'PLLVP25',
  29             'PLLDV',
  30             'PLLVREG',
  31             'PLLGND',
  32         ],
  33         'POWER_GPIO': [
  34             'VDD_GPIOB',
  35             'GND_GPIOB',
  36         ]}
  37     fixedpins = {}
  38     function_names = {
  39                       'PWM': 'PWM (pulse-width modulation)',
  40                       'MSPI0': 'SPI Master 1 (general)',
  41                       'MSPI1': 'SPI Master 2 (SDCard)',
  42                       'UART0': 'UART (TX/RX) 1',
  43                       'SYS': 'System Control',
  44                       'GPIO': 'GPIO',
  45                       'EINT': 'External Interrupt',
  46                       'PWM': 'PWM',
  47                       'JTAG': 'JTAG',
  48                       'SD0': 'SD/MMC 1',
  49                       'SDR': 'SDRAM',
  50                       'VDD': 'Power',
  51                       'VSS': 'GND',
  52                       #'LPC1': 'Low Pincount Interface 1',
  53                       #'LPC2': 'Low Pincount Interface 2',
  54                       }
  55
  56     ps = PinSpec(pinbanks, fixedpins, function_names)
  57
  58     ps.vss("", ('N', 0), 0, 0, 1)
  59     ps.vdd("", ('N', 1), 0, 0, 1)
  60     ps.sdram1("", ('N', 2), 0, 0, 30)
  61     ps.vss("", ('N', 30), 0, 1, 1)
  62     ps.vdd("", ('N', 31), 0, 1, 1)
  63
  64     ps.vss("", ('E', 0), 0, 2, 1)
  65     ps.sdram2("", ('E', 1), 0, 0, 12)
  66     ps.vdd("", ('E', 13), 0, 2, 1)
  67     ps.gpio("", ('E', 14), 0, 8, 8)
  68     ps.vss("", ('E', 23), 0, 3, 1)
  69     ps.jtag("", ('E', 24), 0, 0, 4)
  70     ps.vdd("", ('E', 31), 0, 3, 1)
  71
  72     ps.vss("", ('S', 0), 0, 4, 1)
  73     ps.sys("", ('S', 1), 0, 0, 7)
  74     ps.vdd("", ('S', 8), 0, 4, 1)
  75     ps.mspi("0", ('S', 15), 0)
  76     ps.uart("0", ('S', 20), 0)
  77     ps.vss("", ('S', 22), 0, 5, 1)
  78     ps.gpio("", ('S', 23), 0, 0, 8)
  79     ps.vdd("", ('S', 31), 0, 5, 1)
  80
  81     ps.vss("", ('W', 0), 0, 6, 1)
  82     ps.pwm("", ('W', 1), 0, 0, 2)
  83     ps.eint("", ('W', 3), 0, 0, 3)
  84     ps.mspi("1", ('W', 6), 0)
  85     ps.vdd("", ('W', 10), 0, 6, 1)
  86     ps.sdmmc("0", ('W', 11), 0)
  87     ps.vss("", ('W', 17), 0, 7, 1)
  88     ps.vdd("", ('W', 31), 0, 7, 1)
  89     #ps.mspi("0", ('W', 8), 0)
  90     #ps.mspi("1", ('W', 8), 0)
  91
  92     #ps.mquadspi("1", ('S', 0), 0)
  93
  94     # Scenarios below can be spec'd out as either "find first interface"
  95     # by name/number e.g. SPI1, or as "find in bank/mux" which must be
  96     # spec'd as "BM:Name" where B is bank (A-F), M is Mux (0-3)
  97     # EINT and PWM are grouped together, specially, but may still be spec'd
  98     # using "BM:Name".  Pins are removed in-order as listed from
  99     # lists (interfaces, EINTs, PWMs) from available pins.
 100
 101     ls180 = ['SD0', 'UART0', 'GPIOS', 'GPIOE', 'JTAG', 'PWM', 'EINT',
 102              'VDD', 'VSS', 'SYS',
 103                 'TWI0', 'MSPI0', 'MSPI1', 'SDR']
 104     ls180_eint = []
 105     ls180_pwm = []#['B0:PWM_0']
 106     descriptions = {
 107         'SD0': 'user-facing: internal (on Card), multiplexed with JTAG\n'
 108         'and UART2, for debug purposes',
 109         'TWI2': 'I2C.\n',
 110         'E2:SD1': '',
 111         'MSPI1': '',
 112         'UART0': '',
 113         'LPC1': '',
 114         'SYS': '',
 115         'LPC2': '',
 116         'SDR': '',
 117         'B1:LCD/22': '18-bit RGB/TTL LCD',
 118         'ULPI0/8': 'user-facing: internal (on Card), USB-OTG ULPI PHY',
 119         'ULPI1': 'dual USB2 Host ULPI PHY'
 120     }
 121
 122     ps.add_scenario("Libre-SOC 180nm", ls180, ls180_eint, ls180_pwm,
 123                     descriptions)
 124
 125     return ps