Makefile

   1 PYTHON3 ?= "python3"
   2
   3 .PHONY: help Makefile gitupdate install run_sim test htmlupload
   4
   5 gitupdate:
   6         git submodule init
   7         git submodule update --init --recursive --remote
   8
   9 mkpinmux:
  10         ./mkpinmux.sh
  11         cp pinmux/ls180/ls180_pins.py src/soc/debug
  12         cp pinmux/ls180/ls180_pins.py src/soc/litex/florent/libresoc
  13
  14 install: gitupdate develop mkpinmux svanalysis
  15
  16 # this is now actually part of openpower-isa repository
  17 pywriter:
  18         pywriter
  19
  20 # this is now actually part of openpower-isa repository
  21 svanalysis:
  22         svanalysis
  23
  24 develop:
  25         python3 setup.py develop # yes, develop, not install
  26
  27 # build and run libresoc litex simulation
  28 run_sim:
  29         python3 src/soc/simple/issuer_verilog.py --disable-svp64 \
  30                         src/soc/litex/florent/libresoc/libresoc.v
  31         python3 src/soc/litex/florent/sim.py --cpu=libresoc
  32
  33 # and with test gpio (useful for XICS IRC testing)
  34 testgpio_run_sim:
  35         python3 src/soc/simple/issuer_verilog.py \
  36                         src/soc/litex/florent/libresoc/libresoc.v \
  37                         --enable-testgpio
  38         python3 src/soc/litex/florent/sim.py --cpu=libresoc \
  39                         --variant=standardjtagtestgpio
  40
  41 ls180_verilog_nopll:
  42         python3 src/soc/simple/issuer_verilog.py \
  43                 --debug=jtag --enable-core --disable-pll \
  44                 --enable-xics --disable-svp64 \
  45                         src/soc/litex/florent/libresoc/libresoc.v
  46
  47 ls180_verilog:
  48         python3 src/soc/simple/issuer_verilog.py \
  49                 --debug=jtag --enable-core --enable-pll \
  50                 --enable-xics --disable-svp64 \
  51                         src/soc/litex/florent/libresoc/libresoc.v
  52
  53 ls180_4k_verilog:
  54         python3 src/soc/simple/issuer_verilog.py \
  55                 --debug=jtag --enable-core --enable-pll \
  56                 --enable-xics --enable-sram4x4kblock --disable-svp64 \
  57                         src/soc/litex/florent/libresoc/libresoc.v
  58
  59 # build the litex libresoc SoC without 4k SRAMs
  60 ls180_verilog_build: ls180_verilog
  61         make -C soc/soc/litex/florent ls180
  62
  63 # build the litex libresoc SoC with 4k SRAMs
  64 ls180_4ksram_verilog_build: ls180_4k_verilog
  65         make -C soc/soc/litex/florent ls1804k
  66
  67 # testing (usually done at install time)
  68 test: install
  69         python3 setup.py test # could just run nosetest3...
  70
  71 pypiupload:
  72         $(PYTHON3) setup.py sdist upload
  73
  74 # Minimal makefile for Sphinx documentation
  75 #
  76
  77 # You can set these variables from the command line.
  78 SPHINXOPTS    =
  79 SPHINXBUILD   = sphinx-build
  80 SPHINXPROJ    = Libre-SOC
  81 SOURCEDIR     = .
  82 BUILDDIR      = build
  83
  84 # Put it first so that "make" without argument is like "make help".
  85 help:
  86         @$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
  87
  88 # copies all documentation to libre-soc (libre-soc admins only)
  89 htmlupload: clean html
  90         rsync -HPavz --delete build/html/* \
  91         libre-soc.org:/var/www/libre-soc.org/docs/soc/
  92
  93 # Catch-all target: route all unknown targets to Sphinx using the new
  94 # "make mode" option.  $(O) is meant as a shortcut for $(SPHINXOPTS).
  95 %: Makefile
  96         echo "catch-all falling through to sphinx for document building"
  97         mkdir -p "$(SOURCEDIR)"/src/gen
  98         sphinx-apidoc --ext-autodoc -o "$(SOURCEDIR)"/src/gen ./src/soc
  99         @$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
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