1 from nmigen
import Signal
, Const
2 from nmutil
.dynamicpipe
import SimpleHandshakeRedir
3 from soc
.alu
.alu_input_record
import CompALUOpSubset
4 from ieee754
.fpcommon
.getop
import FPPipeContext
9 def __init__(self
, pspec
):
10 self
.ctx
= FPPipeContext(pspec
)
11 self
.muxid
= self
.ctx
.muxid
18 return [self
.op
.eq(i
.op
), self
.ctx
.eq(i
.ctx
)]
21 class ALUInputData(IntegerData
):
22 def __init__(self
, pspec
):
23 super().__init
__(pspec
)
24 self
.a
= Signal(64, reset_less
=True)
25 self
.b
= Signal(64, reset_less
=True)
26 self
.so
= Signal(reset_less
=True)
27 self
.carry_in
= Signal(reset_less
=True)
30 yield from super().__iter
__()
38 return lst
+ [self
.a
.eq(i
.a
), self
.b
.eq(i
.b
),
39 self
.carry_in
.eq(i
.carry_in
),
43 class ALUOutputData(IntegerData
):
44 def __init__(self
, pspec
):
45 super().__init
__(pspec
)
46 self
.o
= Signal(64, reset_less
=True)
47 self
.carry_out
= Signal(reset_less
=True)
48 self
.carry_out32
= Signal(reset_less
=True)
49 self
.cr0
= Signal(4, reset_less
=True)
50 self
.ov
= Signal(reset_less
=True)
51 self
.ov32
= Signal(reset_less
=True)
52 self
.so
= Signal(reset_less
=True)
55 yield from super().__iter
__()
58 yield self
.carry_out32
66 return lst
+ [self
.o
.eq(i
.o
),
67 self
.carry_out
.eq(i
.carry_out
),
68 self
.carry_out32
.eq(i
.carry_out32
),
69 self
.cr0
.eq(i
.cr0
), self
.ov
.eq(i
.ov
),
70 self
.ov32
.eq(i
.ov32
), self
.so
.eq(i
.so
)]
73 def __init__(self
, id_wid
=2, op_wid
=1):
76 self
.opkls
= lambda _
: CompALUOpSubset(name
="op")
78 class ALUPipeSpec(IntPipeSpec
):
79 def __init__(self
, id_wid
, op_wid
):
80 super().__init
__(id_wid
, op_wid
)
81 self
.pipekls
= SimpleHandshakeRedir